Searched defs:JIT (Results 1 - 25 of 25) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Target/
H A DCodeGenCWrappers.h25 inline Optional<CodeModel::Model> unwrap(LLVMCodeModel Model, bool &JIT) { argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRTargetMachine.cpp43 AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFTargetMachine.cpp57 BPFTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiTargetMachine.cpp56 LanaiTargetMachine(const Target &T, const Triple &TT, StringRef Cpu, StringRef FeatureString, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CodeModel, CodeGenOpt::Level OptLevel, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430TargetMachine.cpp40 MSP430TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCTargetMachine.cpp30 ARCTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/
H A DVETargetMachine.cpp68 VETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreTargetMachine.cpp46 XCoreTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonTargetMachine.cpp204 HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetMachine.cpp59 RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcTargetMachine.cpp74 getEffectiveSparcCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM, bool Is64Bit, bool JIT) argument
92 SparcTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit) argument
193 SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
203 SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
213 SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZTargetMachine.cpp138 getEffectiveSystemZCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM, bool JIT) argument
152 SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetMachine.cpp311 ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
319 ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsTargetMachine.cpp99 static Reloc::Model getEffectiveRelocModel(bool JIT, argument
111 MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool isLittle) argument
143 MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
153 MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXTargetMachine.cpp134 NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
144 NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetMachine.cpp244 getEffectiveAArch64CodeModel(const Triple &TT, Optional<CodeModel::Model> CM, bool JIT) argument
268 AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool LittleEndian) argument
355 AArch64leTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
363 AArch64beTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCTargetMachine.cpp245 getEffectivePPCCodeModel(const Triple &TT, Optional<CodeModel::Model> CM, bool JIT) argument
302 PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/
H A DTargetMachineC.cpp130 bool JIT; local
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyTargetMachine.cpp117 WebAssemblyTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetMachine.cpp154 getEffectiveRelocModel(const Triple &TT, bool JIT, Optional<Reloc::Model> RM) argument
196 getEffectiveX86CodeModel(Optional<CodeModel::Model> CM, bool JIT, bool Is64Bit) argument
210 X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/
H A DExecutionEngine.h530 JIT = 0x1, enumerator in enum:llvm::EngineKind::Kind
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/ExecutionEngine/
H A DExecutionEngineBindings.cpp202 bool JIT; local
/freebsd-13-stable/contrib/llvm-project/llvm/tools/bugpoint/
H A DToolRunner.cpp532 class JIT : public AbstractInterpreter { class in namespace:__anon4817
536 JIT(const std::string &Path, const std::vector<std::string> *Args) function in class:__anon4817::JIT
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetMachine.cpp494 R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, TargetOptions Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
538 GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, TargetOptions Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Support/
H A DTargetRegistry.h1118 Allocator(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument

Completed in 168 milliseconds