| /freebsd-10.0-release/contrib/llvm/lib/CodeGen/ |
| H A D | SjLjEHPrepare.cpp | 293 Instruction *Inst = II; local
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/MC/ |
| H A D | MCNullStreamer.cpp | 100 virtual void EmitInstruction(const MCInst &Inst) {} argument
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| H A D | MCObjectStreamer.cpp | 191 void MCObjectStreamer::EmitInstruction(const MCInst &Inst) { argument
230 void MCObjectStreamer::EmitInstToFragment(const MCInst &Inst) { argument
[all...] |
| H A D | MCELFStreamer.cpp | 392 void MCELFStreamer::EmitInstToFragment(const MCInst &Inst) { argument
400 void MCELFStreamer::EmitInstToData(const MCInst &Inst) { argument
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| /freebsd-10.0-release/contrib/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 340 DecodeCPU16RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
349 DecodeCPU64RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
362 DecodeCPURegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
373 DecodeDSPRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
380 DecodeFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
392 DecodeFGR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
404 DecodeCCRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
412 DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
434 DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
453 DecodeHWRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
464 DecodeCondCode(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
473 DecodeAFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
486 DecodeHWRegs64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
497 DecodeACRegsDSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
509 DecodeHIRegsDSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
521 DecodeLORegsDSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
533 DecodeBranchTarget(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
543 DecodeBC1(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
553 DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
564 DecodeSimm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
572 DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
583 DecodeExtSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 376 MipsAnalyzeImmediate::InstSeq::const_iterator Inst = Seq.begin(); local
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| /freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 263 static void SimplifyShortImmForm(MCInst &Inst, unsigned Opcode) { argument
284 SimplifyShortMoveForm(X86AsmPrinter &Printer, MCInst &Inst, unsigned Opcode) argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 210 DecodeGRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
222 DecodeRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
234 DecodeBitpOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
245 DecodeNegImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
286 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
356 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
369 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
382 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
395 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
409 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
422 DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
435 DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
449 DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
520 DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
534 DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
548 Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
561 Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
574 Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
587 Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
600 DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
614 DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
629 DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
643 DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
657 DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
677 DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
691 DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
711 DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
730 DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 53 bool InstCombiner::SimplifyDemandedInstructionBits(Instruction &Inst) { argument
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| H A D | InstCombinePHI.cpp | 559 Instruction *Inst; // The trunc instruction. member in struct:__anon2594::PHIUsageRecord
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| /freebsd-10.0-release/contrib/llvm/lib/Transforms/ObjCARC/ |
| H A D | ObjCARCContract.cpp | 432 Instruction *Inst = &*I++; local
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Transforms/Utils/ |
| H A D | LoopSimplify.cpp | 312 Instruction *Inst = I++; local
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| H A D | LowerInvoke.cpp | 328 Instruction *Inst = II; local
[all...] |
| H A D | Local.cpp | 415 Instruction *Inst = BI++; local
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| /freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 240 DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
251 DecodeGPR64xspRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
261 DecodeGPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
273 DecodeGPR32wspRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
284 DecodeFPR8RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
295 DecodeFPR16RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
307 DecodeFPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
318 DecodeFPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
330 DecodeFPR128RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
341 DecodeVPR128RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
351 DecodeAddrRegExtendOperand(llvm::MCInst &Inst, unsigned OptionHiS, uint64_t Address, const void *Decoder) argument
364 DecodeBitfield32ImmOperand(llvm::MCInst &Inst, unsigned Imm6Bits, uint64_t Address, const void *Decoder) argument
377 DecodeCVT32FixedPosOperand(llvm::MCInst &Inst, unsigned Imm6Bits, uint64_t Address, const void *Decoder) argument
389 DecodeFPZeroOperand(llvm::MCInst &Inst, unsigned RmBits, uint64_t Address, const void *Decoder) argument
402 DecodeMoveWideImmOperand(llvm::MCInst &Inst, unsigned FullImm, uint64_t Address, const void *Decoder) argument
417 DecodeLogicalImmOperand(llvm::MCInst &Inst, unsigned Bits, uint64_t Address, const void *Decoder) argument
430 DecodeRegExtendOperand(llvm::MCInst &Inst, unsigned ShiftAmount, uint64_t Address, const void *Decoder) argument
442 Decode32BitShiftOperand(llvm::MCInst &Inst, unsigned ShiftAmount, uint64_t Address, const void *Decoder) argument
454 DecodeBitfieldInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
546 DecodeFMOVLaneInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
570 DecodeLDSTPairInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
654 DecodeLoadPairExclusiveInstruction(llvm::MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) argument
690 DecodeNamedImmOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
705 DecodeSysRegOperand(const A64SysReg::SysRegMapper &Mapper, llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
718 DecodeMRSOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
726 DecodeMSROperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
734 DecodeSingleIndexedInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackend.cpp | 203 void ARMAsmBackend::relaxInstruction(const MCInst &Inst, MCInst &Res) const { argument
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/AsmParser/ |
| H A D | MBlazeAsmParser.cpp | 183 void addExpr(MCInst &Inst, const MCExpr *Expr) const { argument
193 void addRegOperands(MCInst &Inst, unsigned N) const { argument
198 void addImmOperands(MCInst &Inst, unsigned N) const { argument
203 void addFslOperands(MCInst &Inst, unsigned N) const { argument
208 addMemOperands(MCInst &Inst, unsigned N) const argument
328 MCInst Inst; local
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Transforms/Scalar/ |
| H A D | DeadStoreElimination.cpp | 192 getLocForWrite(Instruction *Inst, AliasAnalysis &AA) { argument
231 getLocForRead(Instruction *Inst, AliasAnalysis &AA) { argument
457 static bool isPossibleSelfRead(Instruction *Inst, argument
496 Instruction *Inst = BBI++; local
572 << *DepWrite << "\\n KILLER: " << *Inst << '\\n'); local
794 Instruction *Inst = BBI++; local
[all...] |
| H A D | EarlyCSE.cpp | 50 Instruction *Inst; member in struct:__anon2628::SimpleValue
61 static bool canHandle(Instruction *Inst) { argument
93 Instruction *Inst = Val.Inst; local
198 Instruction *Inst; member in struct:__anon2629::CallValue
209 canHandle(Instruction *Inst) argument
240 Instruction *Inst = Val.Inst; local
432 Instruction *Inst = I++; local
537 << *Inst << '\\n'); local
[all...] |
| H A D | LICM.cpp | 617 bool LICM::isSafeToExecuteUnconditionally(Instruction &Inst) { argument
625 bool LICM::isGuaranteedToExecute(Instruction &Inst) { argument
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| /freebsd-10.0-release/contrib/llvm/tools/llvm-objdump/ |
| H A D | MachODump.cpp | 413 MCInst Inst; local
458 MCInst Inst; local
554 const MCDecodedInst &Inst = fi->second.getInsts()[ii]; local
[all...] |
| H A D | llvm-objdump.cpp | 353 MCInst Inst; local
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| /freebsd-10.0-release/contrib/llvm/utils/TableGen/ |
| H A D | DAGISelMatcherGen.cpp | 635 GetInstPatternNode(const DAGInstruction &Inst, const TreePatternNode *N) { argument
689 const DAGInstruction &Inst = CGP.getInstruction(Op); local
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| /freebsd-10.0-release/contrib/llvm/lib/Analysis/ |
| H A D | MemoryDependenceAnalysis.cpp | 117 AliasAnalysis::ModRefResult GetLocation(const Instruction *Inst, argument
100 RemoveFromReverseMap(DenseMap<Instruction*, SmallPtrSet<KeyTy, 4> > &ReverseMap, Instruction *Inst, KeyTy Val) argument
[all...] |
| H A D | ValueTracking.cpp | 1931 const Operator *Inst = dyn_cast<Operator>(V); local
|