| /macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 366 FastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm) argument
410 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
435 FastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm) argument
519 int Imm; local
575 unsigned Imm = (unsigned)~(CI->getSExtValue()); local
976 signed Imm = (Addr.Offset < 0) ? (0x100 | -Addr.Offset) : Addr.Offset; local
990 signed Imm = (Addr.Offset < 0) ? (0x100 | -Addr.Offset) : Addr.Offset; local
1350 uint64_t Imm = CI->getZExtValue(); local
1411 int Imm = 0; local
1673 int Imm = 0; local
[all...] |
| H A D | ARMISelDAGToDAG.cpp | 83 inline SDValue getI32Imm(unsigned Imm) { argument
285 isInt32Immediate(SDNode *N, unsigned &Imm) argument
295 isInt32Immediate(SDValue N, unsigned &Imm) argument
302 isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) argument
[all...] |
| H A D | ARMISelLowering.cpp | 3731 unsigned OpCmode, Imm; local
3913 isVEXTMask(ArrayRef<int> M, EVT VT, bool &ReverseVEXT, unsigned &Imm) argument
4492 unsigned Imm, WhichResult; local
4656 unsigned Imm; local
8440 unsigned Imm = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); local
9866 isFPImmLegal(const APFloat &Imm, EVT VT) const argument
[all...] |
| /macosx-10.10/llvmCore-3425.0.34/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1548 bool HexagonTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { argument
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| /macosx-10.10/llvmCore-3425.0.34/lib/Target/NVPTX/ |
| H A D | NVPTXAsmPrinter.cpp | 491 int Imm = (int)MO.getImm(); local
618 int Imm = (int)MO.getImm(); local
[all...] |
| /macosx-10.10/llvmCore-3425.0.34/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 185 } Imm; member in union:__anon10538::X86Operand::__anon10539
969 const MCExpr *Imm = MCConstantExpr::Create(Size, getContext()); local
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| /macosx-10.10/llvmCore-3425.0.34/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 721 void addLegalFPImmediate(const APFloat& Imm) { argument
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| H A D | X86ISelDAGToDAG.cpp | 268 inline SDValue getI8Imm(unsigned Imm) { argument
274 inline SDValue getI32Imm(unsigned Imm) { argument
2516 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i8); local
2588 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i16); local
2610 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i32); local
2694 uint64_t Imm = Cst->getZExtValue(); local
2735 uint64_t Imm = Cst->getZExtValue(); local
[all...] |
| H A D | X86ISelLowering.cpp | 3192 bool X86TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { argument
|
| /macosx-10.10/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2140 APInt Imm = APInt::getLowBitsSet(ExtDstTyBits, ExtSrcTyBits); local
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| H A D | SelectionDAG.cpp | 962 APInt Imm = APInt::getLowBitsSet(BitWidth, local
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| H A D | DAGCombiner.cpp | 7309 APInt Imm = cast<ConstantSDNode>(N1)->getAPIntValue(); local
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| /macosx-10.10/llvmCore-3425.0.34/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3748 bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { argument
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| /macosx-10.10/llvmCore-3425.0.34/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 3246 int64_t Imm = ExtractImmediate(G, SE); local
3432 int64_t Imm; member in struct:__anon10665::WorkItem
3446 << " , add offset " << Imm; local
3467 int64_t Imm = ExtractImmediate(Reg, SE); local
3521 int64_t Imm = (uint64_t)JImm - M->first; local
3542 int64_t Imm = WI.Imm; local
[all...] |
| /macosx-10.10/llvmCore-3425.0.34/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 359 } Imm; member in union:__anon10409::ARMOperand::__anon10410
384 unsigned Imm; member in struct:__anon10409::ARMOperand::__anon10410::__anon10425
398 unsigned Imm; member in struct:__anon10409::ARMOperand::__anon10410::__anon10428
1461 unsigned Imm = (RegShiftedImm.ShiftImm == 32 ? 0 : RegShiftedImm.ShiftImm); local
1582 unsigned Imm = CE->getValue(); local
1647 int32_t Imm = Memory.OffsetImm->getValue(); local
1918 int Imm = CE->getValue(); local
1929 int Imm = CE->getValue(); local
1949 unsigned Imm = ARM_AM::getAM2Opc(opc, PostIdxReg.ShiftImm, local
2057 unsigned Imm = 0; local
2159 CreateShifterImm(bool isASR, unsigned Imm, SMLoc S, SMLoc E) argument
2169 CreateRotImm(unsigned Imm, SMLoc S, SMLoc E) argument
2543 int64_t Imm = 0; local
[all...] |
| /macosx-10.10/llvmCore-3425.0.34/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 850 static bool isIntS16Immediate(SDNode *N, short &Imm) { argument
860 static bool isIntS16Immediate(SDValue Op, short &Imm) { argument
965 short Imm; local
1077 short Imm; local
[all...] |