| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 285 bool BPFAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 288 bool CSKYAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 737 LocTy IDLoc = Lex.getLoc(); local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/MC/MCParser/ |
| H A D | DarwinAsmParser.cpp | 761 bool DarwinAsmParser::parseDirectiveSecureLogUnique(StringRef, SMLoc IDLoc) { argument
802 bool DarwinAsmParser::parseDirectiveSecureLogReset(StringRef, SMLoc IDLoc) { argument
586 parseDirectiveDumpOrLoad(StringRef Directive, SMLoc IDLoc) argument
829 SMLoc IDLoc = getLexer().getLoc(); local
914 SMLoc IDLoc = getLexer().getLoc(); local
[all...] |
| H A D | AsmParser.cpp | 1779 SMLoc IDLoc = ID.getLoc(); local
2302 parseAndMatchAndEmitTargetInstruction(ParseStatementInfo &Info, StringRef IDVal, AsmToken ID, SMLoc IDLoc) argument
2754 SMLoc IDLoc = Lexer.getLoc(); local
5745 parseDirectiveMSEmit(SMLoc IDLoc, ParseStatementInfo &Info, size_t Len) argument
5762 parseDirectiveMSAlign(SMLoc IDLoc, ParseStatementInfo &Info) argument
[all...] |
| H A D | MasmParser.cpp | 1995 SMLoc IDLoc = ID.getLoc(); local
3007 SMLoc IDLoc = Lexer.getLoc(); local
6836 parseDirectiveMSEmit(SMLoc IDLoc, ParseStatementInfo &Info, size_t Len) argument
6853 parseDirectiveMSAlign(SMLoc IDLoc, ParseStatementInfo &Info) argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 967 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm) argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 760 bool VEAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 557 bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc, argument
631 bool SparcAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 169 void MipsTargetStreamer::emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc, argument
133 emitDirectiveCpRestore( int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
178 emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
188 emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
193 emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
198 emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
208 emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, MCOperand Op2, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
220 emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
226 emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, MCOperand Op3, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
239 emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
245 emitRRIII(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm0, int16_t Imm1, int16_t Imm2, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
267 emitDSLL(unsigned DstReg, unsigned SrcReg, int16_t ShiftAmount, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
278 emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
286 emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI) argument
294 emitGPRestore(int Offset, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
300 emitStoreWithImmOffset( unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
337 emitLoadWithImmOffset(unsigned Opcode, unsigned DstReg, unsigned BaseReg, int64_t Offset, unsigned TmpReg, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
684 emitDirectiveCpRestore( int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
1203 emitDirectiveCpRestore( int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 1150 bool PPCAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 468 bool HexagonAsmParser::finishBundle(SMLoc IDLoc, MCStreamer &Out) { argument
512 auto IDLoc = Parser.getTok().getLoc(); local
554 matchOneInstruction(MCInst &MCI, SMLoc IDLoc, OperandVector &InstOperands, uint64_t &ErrorInfo, bool MatchingInlineAsm) argument
613 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm) argument
1281 OutOfRange(SMLoc IDLoc, long long Val, long long Max) argument
1292 processInstruction(MCInst &Inst, OperandVector const &Operands, SMLoc IDLoc) argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 1493 bool SystemZAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 4013 bool X86AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, argument
4024 void X86AsmParser::MatchFPUWaitAlias(SMLoc IDLoc, X86Operand &Op, argument
4050 ErrorMissingFeature(SMLoc IDLoc, const FeatureBitset &MissingFeatures, bool MatchingInlineAsm) argument
4116 MatchAndEmitATTInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm) argument
4378 MatchAndEmitIntelInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm) argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 4128 bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc, argument
4741 bool AArch64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 4111 validateCoherencyBits(const MCInst &Inst, const OperandVector &Operands, const SMLoc &IDLoc) argument
4157 validateInstruction(const MCInst &Inst, const SMLoc &IDLoc, const OperandVector &Operands) argument
4290 checkUnsupportedInstruction(StringRef Mnemo, const SMLoc &IDLoc) argument
4321 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm) argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 1872 processInstruction(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
2348 TOut.emitEmptyDelaySlot(hasShortDelaySlot(Inst), IDLoc, STI); local
2360 TOut.emitEmptyDelaySlot(hasShortDelaySlot(Inst), IDLoc, local
2373 tryExpandInstruction(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
2635 expandJalWithRegs(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
2675 TOut.emitEmptyDelaySlot(hasShortDelaySlot(JalrInst), IDLoc, local
2698 loadImmediate(int64_t ImmValue, unsigned DstReg, unsigned SrcReg, bool Is32BitImm, bool IsAddress, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
2862 expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
2876 expandLoadAddress(unsigned DstReg, unsigned BaseReg, const MCOperand &Offset, bool Is32BitAddress, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
2907 loadAndAddSymbolAddress(const MCExpr *SymExpr, unsigned DstReg, unsigned SrcReg, bool Is32BitSym, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
3284 emitPartialAddress(MipsTargetStreamer &TOut, SMLoc IDLoc, MCSymbol *Sym) argument
3358 expandLoadSingleImmToGPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
3374 expandLoadSingleImmToFPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
3428 expandLoadDoubleImmToGPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
3482 MCOperand::createExpr(LoExpr), IDLoc, STI); local
3493 expandLoadDoubleImmToFPR(MCInst &Inst, bool Is64FPU, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
3566 expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
3611 expandBranchImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
3677 expandMem16Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI, bool IsLoad) argument
3804 expandMem9Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI, bool IsLoad) argument
3862 expandLoadStoreMultiple(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
3891 expandCondBranches(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4162 expandDivRem(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI, const bool IsMips64, const bool Signed) argument
4333 expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4372 expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4424 expandUsh(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4475 expandUxw(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4530 expandSge(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4564 expandSgeImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4620 expandSgtImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4667 expandSle(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4701 expandSleImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4749 expandAliasImmediate(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4856 expandRotation(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4918 expandRotationImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
4981 expandDRotation(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5043 expandDRotationImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5138 expandAbs(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5154 expandMulImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5177 expandMulO(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5219 expandMulOU(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5255 expandDMULMacro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5273 expandLoadStoreDMacro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI, bool IsLoad) argument
5321 expandStoreDM1Macro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5358 expandSeq(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5384 expandSeqI(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5407 DstReg, SrcReg, SrcReg, IDLoc, STI); local
5438 expandSne(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5465 expandSneI(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5656 expandMXTRAlias(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5726 expandSaaAddr(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) argument
5925 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm) argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/clang/lib/Sema/ |
| H A D | SemaDeclAttr.cpp | 5880 IdentifierLoc *IDLoc = AL.getArgAsIdent(0); local
|
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 10920 bool ARMAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, argument
12058 FilterNearMisses(SmallVectorImpl<NearMissInfo> &NearMissesIn, SmallVectorImpl<NearMissMessage> &NearMissesOut, SMLoc IDLoc, OperandVector &Operands) argument
12212 ReportNearMisses(SmallVectorImpl<NearMissInfo> &NearMisses, SMLoc IDLoc, OperandVector &Operands) argument
[all...] |