Searched defs:EPPI0_CLKDIV (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF544.h50 #define EPPI0_CLKDIV 0xffc0101c /* EPPI0 Clock Divide Register */ macro
H A DdefBF547.h75 #define EPPI0_CLKDIV 0xffc0101c /* EPPI0 Clock Divide Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF544.h50 #define EPPI0_CLKDIV 0xffc0101c /* EPPI0 Clock Divide Register */ macro
H A DdefBF547.h75 #define EPPI0_CLKDIV 0xffc0101c /* EPPI0 Clock Divide Register */ macro

Completed in 175 milliseconds