| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/ |
| H A D | HexagonExpandPredSpillCode.cpp | 123 int DstReg = MI->getOperand(0).getReg(); local
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| H A D | HexagonPeephole.cpp | 133 unsigned DstReg = Dst.getReg(); local
157 unsigned DstReg = Dst.getReg(); local
169 unsigned DstReg = Dst.getReg(); local
192 unsigned DstReg = Dst.getReg(); local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
| H A D | ExpandPostRAPseudos.cpp | 68 ExpandPostRA::TransferDeadFlag(MachineInstr *MI, unsigned DstReg, argument
102 unsigned DstReg = MI->getOperand(0).getReg(); local
[all...] |
| H A D | OptimizePHIs.cpp | 87 unsigned DstReg = MI->getOperand(0).getReg(); local
130 unsigned DstReg = MI->getOperand(0).getReg(); local
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| H A D | RegisterCoalescer.h | 33 unsigned DstReg; member in class:llvm::CoalescerPair
[all...] |
| H A D | PeepholeOptimizer.cpp | 144 unsigned SrcReg, DstReg, SubIdx; local
[all...] |
| H A D | MachineSink.cpp | 130 unsigned DstReg = MI->getOperand(0).getReg(); local
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| H A D | EarlyIfConversion.cpp | 463 unsigned DstReg = PI.PHI->getOperand(0).getReg(); local
484 unsigned DstReg = MRI->createVirtualRegister(MRI->getRegClass(PHIDst)); local
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| H A D | LiveDebugVariables.cpp | 566 unsigned DstReg = MI->getOperand(0).getReg(); local
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| H A D | TwoAddressInstructionPass.cpp | 382 unsigned SrcReg, DstReg; local
393 static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) { argument
332 isCopyToReg(MachineInstr &MI, const TargetInstrInfo *TII, unsigned &SrcReg, unsigned &DstReg, bool &IsSrcPhys, bool &IsDstPhys) argument
413 findOnlyInterestingUse(unsigned Reg, MachineBasicBlock *MBB, MachineRegisterInfo *MRI, const TargetInstrInfo *TII, bool &IsCopy, unsigned &DstReg, bool &IsDstPhys) argument
634 ScanUses(unsigned DstReg, MachineBasicBlock *MBB, SmallPtrSet<MachineInstr*, 8> &Processed) argument
698 unsigned SrcReg, DstReg; local
746 unsigned DstReg; local
901 unsigned DstReg; local
1215 unsigned DstReg = DstMO.getReg(); local
1427 unsigned DstReg = mi->getOperand(DstIdx).getReg(); local
1475 UpdateRegSequenceSrcs(unsigned SrcReg, unsigned DstReg, unsigned SubIdx, MachineRegisterInfo *MRI, const TargetRegisterInfo &TRI) argument
1527 CoalesceExtSubRegs(SmallVector<unsigned,4> &Srcs, unsigned DstReg) argument
1663 unsigned DstReg = MI->getOperand(0).getReg(); local
[all...] |
| H A D | RegisterCoalescer.cpp | 714 reMaterializeTrivialDef(LiveInterval &SrcInt, unsigned DstReg, MachineInstr *CopyMI) argument
854 updateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx) argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/ |
| H A D | MSP430RegisterInfo.cpp | 208 unsigned DstReg = MI.getOperand(0).getReg(); local
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| H A D | MSP430ISelLowering.cpp | 1085 unsigned DstReg = MI->getOperand(0).getReg(); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | Thumb2ITBlockPass.cpp | 117 unsigned DstReg = MI->getOperand(0).getReg(); local
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| H A D | MLxExpansionPass.cpp | 274 unsigned DstReg = MI->getOperand(0).getReg(); local
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| H A D | ARMExpandPseudoInsts.cpp | 388 unsigned DstReg = MI.getOperand(OpIdx++).getReg(); local
617 unsigned DstReg = MI.getOperand(0).getReg(); local
867 unsigned DstReg = MI.getOperand(0).getReg(); local
891 unsigned DstReg = MI.getOperand(0).getReg(); local
951 unsigned DstReg = MI.getOperand(OpIdx++).getReg(); local
[all...] |
| H A D | ARMAsmPrinter.cpp | 1130 unsigned SrcReg, DstReg; local
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| H A D | ARMFastISel.cpp | 2143 unsigned DstReg = VA.getLocReg(); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 328 unsigned DstReg = I->getOperand(0).getReg(); local
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| H A D | MipsISelDAGToDAG.cpp | 225 unsigned DstReg = 0, ZeroReg = 0; local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/ |
| H A D | XCoreFrameLowering.cpp | 45 loadFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DstReg, int Offset, DebugLoc dl, const TargetInstrInfo &TII) argument
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| H A D | XCoreRegisterInfo.cpp | 302 loadConstant(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DstReg, int64_t Value, DebugLoc dl) const argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 86 isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const argument
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| H A D | PPCFrameLowering.cpp | 133 unsigned DstReg = MI->getOperand(0).getReg(); local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 113 isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const argument
408 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DstReg, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg) const argument
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