| /freebsd-current/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCopyPhysRegs.cpp | 79 Register DstReg = MI->getOperand(0).getReg(); local
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| H A D | SystemZPostRewrite.cpp | 218 Register DstReg = MI.getOperand(0).getReg(); local
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| /freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ExpandPostRAPseudos.cpp | 66 Register DstReg = MI->getOperand(0).getReg(); local
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| H A D | RegisterCoalescer.h | 33 Register DstReg; member in class:llvm::CoalescerPair
[all...] |
| H A D | OptimizePHIs.cpp | 100 Register DstReg = MI->getOperand(0).getReg(); local
144 Register DstReg = MI->getOperand(0).getReg(); local
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| H A D | TwoAddressInstructionPass.cpp | 289 isCopyToReg(MachineInstr &MI, Register &SrcReg, Register &DstReg, bool &IsSrcPhys, bool &IsDstPhys) const argument
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| /freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVPostRAExpandPseudoInsts.cpp | 95 Register DstReg = MBBI->getOperand(0).getReg(); local
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| H A D | RISCVOptWInstrs.cpp | 646 Register DstReg = MI.getOperand(0).getReg(); local
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| /freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LowerTileCopy.cpp | 84 Register DstReg = DstMO.getReg(); local
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| /freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPeephole.cpp | 135 Register DstReg = Dst.getReg(); local
155 Register DstReg = Dst.getReg(); local
172 Register DstReg = Dst.getReg(); local
183 Register DstReg = Dst.getReg(); local
205 Register DstReg = Dst.getReg(); local
[all...] |
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 46 Register DstReg = MI->getOperand(0).getReg(); local
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| /freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InstructionSelect.cpp | 244 Register DstReg = MI.getOperand(0).getReg(); local
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| /freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCompound.cpp | 81 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; local
[all...] |
| H A D | HexagonMCDuplexInfo.cpp | 190 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; local
536 unsigned DstReg, SrcReg; local
[all...] |
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600OptimizeVectorRegisters.cpp | 193 Register DstReg = MRI->createVirtualRegister(&R600::R600_Reg128RegClass); local
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| H A D | R600ExpandSpecialInstrs.cpp | 126 Register DstReg = MI.getOperand(0).getReg(); local
196 Register DstReg = local
[all...] |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 303 Register DstReg = XorTermMI.getOperand(2).getReg(); local
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| H A D | SIFixSGPRCopies.cpp | 192 Register DstReg = Copy.getOperand(0).getReg(); local
228 Register DstReg = MI.getOperand(0).getReg(); local
270 Register DstReg local
[all...] |
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrInfo.cpp | 233 Register DstReg; local
[all...] |
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.cpp | 169 Register DstReg = MI.getOperand(0).getReg(); local
112 foldFrameOffset(MachineBasicBlock::iterator &II, int &Offset, Register DstReg) argument
[all...] |
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2ITBlockPass.cpp | 147 Register DstReg = MI->getOperand(0).getReg(); local
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| /freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 133 Register DstReg = I.getOperand(0).getReg(); local
191 const Register DstReg = I.getOperand(0).getReg(); local
218 const Register DstReg = I.getOperand(0).getReg(); local
243 const Register DstReg = I.getOperand(0).getReg(); local
[all...] |
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RedundantCopyElimination.cpp | 251 MCPhysReg DstReg = PredI.getOperand(0).getReg(); local
[all...] |
| H A D | AArch64SpeculationHardening.cpp | 567 Register DstReg = MI.getOperand(0).getReg(); local
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| H A D | AArch64StackTaggingPreRA.cpp | 285 Register DstReg = UseI.getOperand(0).getReg(); local
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