Searched defs:DPG1_DPG_CONTROL__DPG_VRES_MASK (Results 1 - 13 of 13) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h13999 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_0_3_sh_mask.h13865 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_1_6_sh_mask.h28936 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_1_4_sh_mask.h30199 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_1_5_sh_mask.h26195 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_2_0_0_sh_mask.h29101 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_1_2_sh_mask.h28170 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_2_1_0_sh_mask.h25752 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_0_1_sh_mask.h21959 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_2_1_sh_mask.h23384 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_0_0_sh_mask.h28213 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_0_2_sh_mask.h24982 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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H A Ddcn_3_2_0_sh_mask.h23381 #define DPG1_DPG_CONTROL__DPG_VRES_MASK macro
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