/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
H A D | AttributorAttributes.cpp | 176 constructPointer(Type *ResTy, Value *Ptr, int64_t Offset, IRBuilder<NoFolder> &IRB, const DataLayout &DL) argument 353 stripAndAccumulateMinimalOffsets( Attributor &A, const AbstractAttribute &QueryingAA, const Value *Val, const DataLayout &DL, APInt &Offset, bool AllowNonInbounds, bool UseAssumed = false) argument 376 getMinimalBaseOfAccsesPointerOperand( Attributor &A, const AbstractAttribute &QueryingAA, const Instruction *I, int64_t &BytesOffset, const DataLayout &DL, bool AllowNonInbounds = false) argument 391 getBasePointerOfAccessPointerOperand(const Instruction *I, int64_t &BytesOffset, const DataLayout &DL, bool AllowNonInbounds = false) argument 1593 const DataLayout &DL = A.getInfoCache().getDL(); local 1727 const DataLayout &DL = A.getDataLayout(); variable 3335 const DataLayout &DL = A.getDataLayout(); local 3403 const DataLayout &DL = A.getDataLayout(); variable 3559 const DataLayout &DL = A.getDataLayout(); local 3694 const DataLayout &DL = A.getDataLayout(); variable 5256 const DataLayout &DL = F.getParent()->getDataLayout(); local 5290 const DataLayout &DL = IP->getModule()->getDataLayout(); local [all...] |
/freebsd-13-stable/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGExpr.cpp | 3100 Optional<ApplyDebugLocation> DL; local
|
H A D | CGOpenMPRuntime.cpp | 2748 auto DL = ApplyDebugLocation::CreateDefaultArtificial(CGF, Loc); local 2783 auto DL = ApplyDebugLocation::CreateDefaultArtificial(CGF, Loc); local 11069 auto DL = ApplyDebugLocation::CreateDefaultArtificial(CGF, Loc); local
|
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 182 static SDValue getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, argument 344 getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, Optional<CallingConv::ID> CallConv) argument 494 getCopyToParts(SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V, Optional<CallingConv::ID> CallConv = None, ISD::NodeType ExtendKind = ISD::ANY_EXTEND) argument 631 widenVectorToPartType(SelectionDAG &DAG, SDValue Val, const SDLoc &DL, EVT PartVT) argument 659 getCopyToPartsVector(SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V, Optional<CallingConv::ID> CallConv) argument 782 RegsForValue(LLVMContext &Context, const TargetLowering &TLI, const DataLayout &DL, unsigned Reg, Type *Ty, Optional<CallingConv::ID> CC) argument 1245 DebugLoc DL = DDI.getdl(); local 1795 auto &DL = DAG.getDataLayout(); local 2511 getLoadStackGuard(SelectionDAG &DAG, const SDLoc &DL, SDValue &Chain) argument 3053 SDLoc DL = getCurSDLoc(); local 3457 SDLoc DL = getCurSDLoc(); local 3892 auto &DL = DAG.getDataLayout(); local 4260 const DataLayout &DL = DAG.getDataLayout(); local 5225 ExpandPowI(const SDLoc &DL, SDValue LHS, SDValue RHS, SelectionDAG &DAG) argument 5278 expandDivFix(unsigned Opcode, const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue Scale, SelectionDAG &DAG, const TargetLowering &TLI) argument 5375 EmitFuncArgumentDbgValue( const Value *V, DILocalVariable *Variable, DIExpression *Expr, DILocation *DL, bool IsDbgDeclare, const SDValue &N) argument 6898 auto DL = getCurSDLoc(); local 7120 auto &DL = DAG.getDataLayout(); local 7887 auto &DL = DAG.getDataLayout(); local 7909 GetRegistersForValue(SelectionDAG &DAG, const SDLoc &DL, SDISelAsmOperandInfo &OpInfo, SDISelAsmOperandInfo &RefOpInfo) argument 8595 const DataLayout &DL = DAG.getDataLayout(); local 8716 addStackMapLiveVars(const CallBase &Call, unsigned StartIdx, const SDLoc &DL, SmallVectorImpl<SDValue> &Ops, SelectionDAGBuilder &Builder) argument 8745 SDLoc DL = getCurSDLoc(); local 9043 auto &DL = CLI.DAG.getDataLayout(); local 9483 findArgumentCopyElisionCandidates(const DataLayout &DL, FunctionLoweringInfo *FuncInfo, ArgCopyElisionMapTy &ArgCopyElisionCandidates) argument 9643 const DataLayout &DL = DAG.getDataLayout(); local 10153 SDLoc DL = getCurSDLoc(); local [all...] |
H A D | DAGCombiner.cpp | 973 reassociationCanBreakAddressingModePattern(unsigned Opc, const SDLoc &DL, SDValue N0, SDValue N1) argument 1031 reassociateOpsCommutative(unsigned Opc, const SDLoc &DL, SDValue N0, SDValue N1) argument 1059 reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, SDValue N1, SDNodeFlags Flags) argument 2510 foldAddSubMasked1(bool IsAdd, SDValue N0, SDValue N1, SelectionDAG &DAG, const SDLoc &DL) argument 2634 flipBoolean(SDValue V, const SDLoc &DL, SelectionDAG &DAG, const TargetLowering &TLI) argument 3041 tryFoldToZero(const SDLoc &DL, const TargetLowering &TLI, EVT VT, SelectionDAG &DAG, bool LegalOperations) argument 4619 foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1, const SDLoc &DL) argument 6162 extractShiftForRotate(SelectionDAG &DAG, SDValue OppShift, SDValue ExtractFrom, SDValue &Mask, const SDLoc &DL) argument 6390 MatchRotatePosNeg(SDValue Shifted, SDValue Pos, SDValue Neg, SDValue InnerPos, SDValue InnerNeg, unsigned PosOpcode, unsigned NegOpcode, const SDLoc &DL) argument 6417 MatchFunnelPosNeg(SDValue N0, SDValue N1, SDValue Pos, SDValue Neg, SDValue InnerPos, SDValue InnerNeg, unsigned PosOpcode, unsigned NegOpcode, const SDLoc &DL) argument 6484 MatchRotate(SDValue LHS, SDValue RHS, const SDLoc &DL) argument 7983 auto DL = SDLoc(N); local 8723 combineMinNumMaxNum(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, SDValue True, SDValue False, ISD::CondCode CC, const TargetLowering &TLI, SelectionDAG &DAG) argument 16329 const DataLayout &DL = DAG.getDataLayout(); local 16453 const DataLayout &DL = DAG.getDataLayout(); local 16523 const DataLayout &DL = DAG.getDataLayout(); local 18188 createBuildVecShuffle(const SDLoc &DL, SDNode *N, ArrayRef<int> VectorMask, SDValue VecIn1, SDValue VecIn2, unsigned LeftIdx, bool DidSplitVec) argument 20924 SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2) argument 21149 foldSelectCCToShiftAnd(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC) argument 21224 convertSelectOfFPConstantsToLoadOffset( const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC) argument 21279 SimplifySelectCC(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC, bool NotExtCompare) argument 21428 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, const SDLoc &DL, bool foldBooleans) argument 21499 BuildLogBase2(SDValue V, const SDLoc &DL) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | CodeGenPrepare.cpp | 327 const DataLayout *DL = nullptr; member in class:__anon3445::CodeGenPrepare 1193 OptimizeNoopCopyExpression(CastInst *CI, const TargetLowering &TLI, const DataLayout &DL) argument 1678 SinkShiftAndTruncate(BinaryOperator *ShiftI, Instruction *User, ConstantInt *CI, DenseMap<BasicBlock *, BinaryOperator *> &InsertedShifts, const TargetLowering &TLI, const DataLayout &DL) argument 1767 OptimizeExtractBits(BinaryOperator *ShiftI, ConstantInt *CI, const TargetLowering &TLI, const DataLayout &DL) argument 1868 despeculateCountZeros(IntrinsicInst *CountZeros, const TargetLowering *TLI, const DataLayout *DL, bool &ModifiedDT) argument 2959 const DataLayout &DL; member in class:__anon3449::AddressingModeMatcher 3786 isPromotedInstructionLegal(const TargetLowering &TLI, const DataLayout &DL, Value *Val) argument 6780 const DataLayout &DL; member in class:__anon3451::VectorPromoteHelper 6962 VectorPromoteHelper(const DataLayout &DL, const TargetLowering &TLI, const TargetTransformInfo &TTI, Instruction *Transition, unsigned CombineCost) argument 7173 splitMergedValStore(StoreInst &SI, const DataLayout &DL, const TargetLowering &TLI) argument 7607 makeBitReverse(Instruction &I, const DataLayout &DL, const TargetLowering &TLI) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 1262 bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL, argument 1524 const DataLayout &DL = DAG.getDataLayout(); local 2131 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2376 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument 2485 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool IsThisReturn, SDValue ThisVal) const argument 2556 const SDLoc &DL = CLI.DL; local 2792 const SDLoc &DL = CLI.DL; local 3313 const DebugLoc &DL = MI.getDebugLoc(); local 3360 emitLoadM0FromVGPRLoop( const SIInstrInfo *TII, MachineRegisterInfo &MRI, MachineBasicBlock &OrigBB, MachineBasicBlock &LoopBB, const DebugLoc &DL, const MachineOperand &IdxReg, unsigned InitReg, unsigned ResultReg, unsigned PhiReg, unsigned InitSaveExecReg, int Offset, bool UseGPRIdxMode, bool IsIndirectSrc) argument 3478 const DebugLoc &DL = MI.getDebugLoc(); local 3541 const DebugLoc &DL = MI.getDebugLoc(); local 3613 const DebugLoc &DL = MI.getDebugLoc(); local 3635 const DebugLoc &DL = MI.getDebugLoc(); local 3690 const DebugLoc &DL = MI.getDebugLoc(); local 3708 const DebugLoc &DL = MI.getDebugLoc(); local 3723 const DebugLoc &DL = MI.getDebugLoc(); local 3752 const DebugLoc &DL = MI.getDebugLoc(); local 3776 const DebugLoc &DL = MI.getDebugLoc(); local 3814 const DebugLoc &DL = MI.getDebugLoc(); local 3887 const DebugLoc &DL = MI.getDebugLoc(); local 4013 DebugLoc DL = MI.getDebugLoc(); local 4045 const DebugLoc &DL = MI.getDebugLoc(); local 4078 const DebugLoc &DL = MI.getDebugLoc(); local 4100 const DebugLoc &DL = MI.getDebugLoc(); local 4118 const DebugLoc &DL = MI.getDebugLoc(); local 4245 getSetCCResultType(const DataLayout &DL, LLVMContext &Ctx, EVT VT) const argument 4470 adjustLoadValueTypeImpl(SDValue Result, EVT LoadVT, const SDLoc &DL, SelectionDAG &DAG, bool Unpacked) argument 4975 getFPExtOrFPRound(SelectionDAG &DAG, SDValue Op, const SDLoc &DL, EVT VT) const argument 5105 getSegmentAperture(unsigned AS, const SDLoc &DL, SelectionDAG &DAG) const argument 5474 buildPCRelGlobalAddress(SelectionDAG &DAG, const GlobalValue *GV, const SDLoc &DL, int64_t Offset, EVT PtrVT, unsigned GAFlags = SIInstrInfo::MO_NONE) argument 5561 copyToM0(SelectionDAG &DAG, SDValue Chain, const SDLoc &DL, SDValue V) const argument 5589 emitNonHSAIntrinsicError(SelectionDAG &DAG, const SDLoc &DL, EVT VT) argument 5598 emitRemovedIntrinsicError(SelectionDAG &DAG, const SDLoc &DL, EVT VT) argument 5607 getBuildDwordsVector(SelectionDAG &DAG, SDLoc DL, ArrayRef<SDValue> Elts) argument 5671 padEltsToUndef(SelectionDAG &DAG, const SDLoc &DL, EVT CastVT, SDValue Src, int ExtraElts) argument 5692 constructRetValue(SelectionDAG &DAG, MachineSDNode *Result, ArrayRef<EVT> ResultTypes, bool IsTexFail, bool Unpacked, bool IsD16, int DMaskPop, int NumVDataDwords, const SDLoc &DL, LLVMContext &Context) argument 6151 lowerSBuffer(EVT VT, SDLoc DL, SDValue Rsrc, SDValue Offset, SDValue CachePolicy, SelectionDAG &DAG) const argument 7207 getMemIntrinsicNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, ArrayRef<SDValue> Ops, EVT MemVT, MachineMemOperand *MMO, SelectionDAG &DAG) const argument 7673 handleByteShortBufferLoads(SelectionDAG &DAG, EVT LoadVT, SDLoc DL, ArrayRef<SDValue> Ops, MemSDNode *M) const argument 7692 handleByteShortBufferStores(SelectionDAG &DAG, EVT VDataType, SDLoc DL, SDValue Ops[], MemSDNode *M) const argument 11020 buildSMovImm32(SelectionDAG &DAG, const SDLoc &DL, uint64_t Val) argument 11026 wrapAddr64Rsrc(SelectionDAG &DAG, const SDLoc &DL, SDValue Ptr) const argument 11061 buildRSRC(SelectionDAG &DAG, const SDLoc &DL, SDValue Ptr, uint32_t RsrcDword1, uint64_t RsrcDword2And3) const argument 11349 DebugLoc DL; local 11695 getTypeLegalizationCost(const DataLayout &DL, Type *Ty) const argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 1582 EVT PPCTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &C, argument 11643 DebugLoc DL = MI.getDebugLoc(); local 11785 DebugLoc DL = MI.getDebugLoc(); local 11922 DebugLoc DL = MI.getDebugLoc(); local 13166 generateEquivalentSub(SDNode *N, int Size, bool Complement, bool Swap, SDLoc &DL, SelectionDAG &DAG) argument 15921 isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I) const argument 16426 const DataLayout &DL = F->getParent()->getDataLayout(); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1308 MVT AArch64TargetLowering::getScalarShiftAmountTy(const DataLayout &DL, argument 1631 DebugLoc DL = MI.getDebugLoc(); local 2004 emitConditionalComparison(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue CCOp, AArch64CC::CondCode Predicate, AArch64CC::CondCode OutCC, const SDLoc &DL, SelectionDAG &DAG) argument 3143 getPTrue(SelectionDAG &DAG, SDLoc DL, EVT VT, int Pattern) argument 3319 LowerTruncateVectorStore(SDLoc DL, StoreSDNode *ST, EVT VT, EVT MemVT, SelectionDAG &DAG) argument 3682 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 3951 saveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, const SDLoc &DL, SDValue &Chain) const argument 4037 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool isThisReturn, SDValue ThisVal) const argument 4308 SDLoc &DL = CLI.DL; local 4767 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument 5078 LowerELFTLSLocalExec(const GlobalValue *GV, SDValue ThreadBase, const SDLoc &DL, SelectionDAG &DAG) const argument 5184 LowerELFTLSDescCallSeq(SDValue SymAddr, const SDLoc &DL, SelectionDAG &DAG) const argument 9178 getReductionSDNode(unsigned Op, SDLoc DL, SDValue ScalarOp, SelectionDAG &DAG) argument 9369 auto &DL = I.getModule()->getDataLayout(); local 9563 const DataLayout &DL = F->getParent()->getDataLayout(); local 9627 auto &DL = Ext->getModule()->getDataLayout(); local 9854 const DataLayout &DL = LI->getModule()->getDataLayout(); local 9987 const DataLayout &DL = SI->getModule()->getDataLayout(); local 10221 isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I) const argument 10279 getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS) const argument 13452 getScaledOffsetForBitWidth(SelectionDAG &DAG, SDValue Offset, SDLoc DL, unsigned BitWidth) argument 14662 const DataLayout &DL = M->getDataLayout(); local 14701 const DataLayout &DL = M->getDataLayout(); local 14987 getPredicateForFixedLengthVector(SelectionDAG &DAG, SDLoc &DL, EVT VT) argument 15055 getPredicateForScalableVector(SelectionDAG &DAG, SDLoc &DL, EVT VT) argument 15063 getPredicateForVector(SelectionDAG &DAG, SDLoc &DL, EVT VT) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1792 EVT ARMTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &, argument 2893 LowerInterruptReturn(SmallVectorImpl<SDValue> &RetOps, const SDLoc &DL, SelectionDAG &DAG) argument 4192 splitValueIntoRegisterParts( SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, Optional<CallingConv::ID> CC) const argument 4210 joinRegisterPartsIntoValue( SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, Optional<CallingConv::ID> CC) const argument 9191 auto &DL = DAG.getDataLayout(); local 9258 const auto &DL = DAG.getDataLayout(); local 9358 const auto &DL = DAG.getDataLayout(); local 10841 DebugLoc DL = MI.getDebugLoc(); local 10914 DebugLoc DL = MI.getDebugLoc(); local 11276 DebugLoc DL = MI.getDebugLoc(); local 16439 getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS) const argument 16653 isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I) const argument 17967 auto &DL = I.getCalledFunction()->getParent()->getDataLayout(); local 17983 auto &DL = I.getCalledFunction()->getParent()->getDataLayout(); local 18002 auto &DL = I.getCalledFunction()->getParent()->getDataLayout(); local 18024 auto &DL = I.getCalledFunction()->getParent()->getDataLayout(); local 18070 auto &DL = I.getCalledFunction()->getParent()->getDataLayout(); local 18082 auto &DL = I.getCalledFunction()->getParent()->getDataLayout(); local 18497 const DataLayout &DL = LI->getModule()->getDataLayout(); local 18650 const DataLayout &DL = SI->getModule()->getDataLayout(); local [all...] |