| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86TargetMachine.cpp | 360 ScheduleDAGMILive *DAG = createGenericSchedLive(C); variable
367 ScheduleDAGMI *DAG = createGenericSchedPostRA(C); variable
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| H A D | X86SelectionDAGInfo.cpp | 31 isBaseRegConflictPossible( SelectionDAG &DAG, ArrayRef<MCPhysReg> ClobberSet) const argument
47 EmitTargetCodeForMemset( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Val, SDValue Size, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
185 emitRepmovs(const X86Subtarget &Subtarget, SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, MVT AVT) argument
207 emitRepmovsB(const X86Subtarget &Subtarget, SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size) argument
235 emitConstantSizeRepmov( SelectionDAG &DAG, const X86Subtarget &Subtarget, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, EVT SizeVT, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) argument
291 EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
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| H A D | X86ISelLowering.cpp | 106 static void errorUnsupported(SelectionDAG &DAG, const SDLoc &dl, argument
2095 SDValue X86TargetLowering::emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val, argument
2621 lowerMasksToReg(const SDValue &ValArg, const EVT &ValLoc, const SDLoc &Dl, SelectionDAG &DAG) argument
2652 Passv64i1ArgInRegs( const SDLoc &Dl, SelectionDAG &DAG, SDValue &Arg, SmallVectorImpl<std::pair<Register, SDValue>> &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, const X86Subtarget &Subtarget) argument
2945 getv64i1Argument(CCValAssign &VA, CCValAssign &NextVA, SDValue &Root, SelectionDAG &DAG, const SDLoc &Dl, const X86Subtarget &Subtarget, SDValue *InFlag = nullptr) argument
2996 lowerRegToMasks(const SDValue &ValArg, const EVT &ValVT, const EVT &ValLoc, const SDLoc &Dl, SelectionDAG &DAG) argument
3032 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, uint32_t *RegMask) const argument
3173 CreateCopyOfByValArgument(SDValue Src, SDValue Dst, SDValue Chain, ISD::ArgFlagsTy Flags, SelectionDAG &DAG, const SDLoc &dl) argument
3231 LowerMemArgument(SDValue Chain, CallingConv::ID CallConv, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, const CCValAssign &VA, MachineFrameInfo &MFI, unsigned i) const argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetMachine.cpp | 280 ScheduleDAGMILive *DAG = local
297 ScheduleDAGMI *DAG = local
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSelectionDAGInfo.cpp | 25 static SDValue emitMemMem(SelectionDAG &DAG, const SDLoc &DL, unsigned Sequence, argument
64 static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, argument
48 EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
75 EmitTargetCodeForMemset( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Byte, SDValue Size, Align Alignment, bool IsVolatile, MachinePointerInfo DstPtrInfo) const argument
146 emitCLC(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, SDValue Src2, uint64_t Size) argument
170 addIPMSequence(const SDLoc &DL, SDValue CCReg, SelectionDAG &DAG) argument
180 EmitTargetCodeForMemcmp( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
195 EmitTargetCodeForMemchr( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue Char, SDValue Length, MachinePointerInfo SrcPtrInfo) const argument
221 EmitTargetCodeForStrcpy( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest, SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo, bool isStpcpy) const argument
231 EmitTargetCodeForStrcmp( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, SDValue Src2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
249 getBoundedStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue Limit) argument
262 EmitTargetCodeForStrlen( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, MachinePointerInfo SrcPtrInfo) const argument
269 EmitTargetCodeForStrnlen( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue MaxLength, MachinePointerInfo SrcPtrInfo) const argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64SelectionDAGInfo.cpp | 58 static SDValue EmitUnrolledSetTag(SelectionDAG &DAG, const SDLoc &dl, argument
18 EmitTargetCodeForMemset( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
110 EmitTargetCodeForSetTag( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Addr, SDValue Size, MachinePointerInfo DstPtrInfo, bool ZeroData) const argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FunctionLoweringInfo.cpp | 82 set(const Function &fn, MachineFunction &mf, SelectionDAG *DAG) argument
|
| H A D | LegalizeTypes.h | 33 SelectionDAG &DAG; member in class:llvm::DAGTypeLegalizer
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| H A D | LegalizeDAG.cpp | 88 SelectionDAG &DAG; member in class:__anon1876::SelectionDAGLegalize
104 SelectionDAGLegalize(SelectionDAG &DAG, argument
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| H A D | SelectionDAGBuilder.h | 389 SelectionDAG &DAG; member in class:llvm::SelectionDAGBuilder
617 explicit StatepointLoweringInfo(SelectionDAG &DAG) : CLI(DAG) {} argument
[all...] |
| H A D | LegalizeVectorOps.cpp | 57 SelectionDAG& DAG; member in class:__anon1878::VectorLegalizer
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| H A D | ScheduleDAGRRList.cpp | 1856 SUnit *popFromQueue(std::vector<SUnit *> &Q, SF &Picker, ScheduleDAG *DAG) { argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | GCNSchedStrategy.cpp | 26 void GCNMaxOccupancySchedStrategy::initialize(ScheduleDAGMI *DAG) { argument
[all...] |
| H A D | AMDGPUTargetMachine.cpp | 282 ScheduleDAGMILive *DAG = local
292 auto DAG = new GCNIterativeScheduler(C, local
305 auto DAG = new GCNIterativeScheduler(C, local
752 ScheduleDAGMILive *DAG = createGenericSchedLive(C); variable
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| H A D | SIMachineScheduler.h | 60 SIScheduleDAGMI *DAG; member in class:llvm::SIScheduleBlock
102 SIScheduleBlock(SIScheduleDAGMI *DAG, SIScheduleBlockCreator *BC, argument
224 SIScheduleDAGMI *DAG; member in class:llvm::SIScheduleBlockCreator
320 SIScheduleDAGMI *DAG; member in class:llvm::SIScheduleBlockScheduler
413 SIScheduleDAGMI *DAG; member in class:llvm::SIScheduler
417 SIScheduler(SIScheduleDAGMI *DAG) argument
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| H A D | R600ISelLowering.cpp | 672 vectorToVerticalVector(SelectionDAG &DAG, SDValue Vector) const argument
775 LowerUADDSUBO(SDValue Op, SelectionDAG &DAG, unsigned mainop, unsigned ovf) const argument
813 LowerImplicitParameter(SelectionDAG &DAG, EVT VT, const SDLoc &DL, unsigned DwordOffset) const argument
1489 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
1594 CompactSwizzlableVector( SelectionDAG &DAG, SDValue VectorEntry, DenseMap<unsigned, unsigned> &RemapSwizzle) argument
1639 ReorganizeVector(SelectionDAG &DAG, SDValue VectorEntry, DenseMap<unsigned, unsigned> &RemapSwizzle) argument
1679 OptimizeSwizzle(SDValue BuildVector, SDValue Swz[4], SelectionDAG &DAG, const SDLoc &DL) const argument
1755 SelectionDAG &DAG = DCI.DAG; local
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 38 static void fail(const SDLoc &DL, SelectionDAG &DAG, const Twine &Msg) { argument
44 static void fail(const SDLoc &DL, SelectionDAG &DAG, const char *Msg, argument
299 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
370 SelectionDAG &DAG = CLI.DAG; local
547 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.cpp | 414 SelectionDAG &DAG = CLI.DAG; local
|
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 198 void HexagonSubtarget::UsrOverflowMutation::apply(ScheduleDAGInstrs *DAG) { argument
211 void HexagonSubtarget::HVXMemLatencyMutation::apply(ScheduleDAGInstrs *DAG) { argument
263 ScheduleDAGMI *DAG = static_cast<ScheduleDAGMI*>(DAGInstrs); local
332 apply(ScheduleDAGInstrs *DAG) argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 224 SelectionDAG &DAG = CLI.DAG; local
369 lowerCallResult(SDValue Chain, SDValue Glue, const SmallVectorImpl<CCValAssign> &RVLocs, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) argument
430 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
445 LowerCallArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
734 LowerVASTART(SDValue Op, SelectionDAG &DAG) argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachinePipeliner.h | 276 static bool classof(const ScheduleDAGInstrs *DAG) { return true; } argument
|
| H A D | MachineScheduler.h | 617 ScheduleDAGMI *DAG = nullptr; member in class:llvm::SchedBoundary
996 ScheduleDAGMILive *DAG = nullptr; member in class:llvm::GenericScheduler
1035 ScheduleDAGMI *DAG = nullptr; member in class:llvm::PostGenericScheduler
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 1349 selectVSplatSimmHelper(SDValue N, SDValue &SplatVal, SelectionDAG &DAG, const RISCVSubtarget &Subtarget, ValidateFn ValidateImm) argument
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| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 515 getAVRCmp(SDValue LHS, SDValue RHS, SelectionDAG &DAG, SDLoc DL) const argument
546 getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue &AVRcc, SelectionDAG &DAG, SDLoc DL) const argument
1124 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
1225 SelectionDAG &DAG = CLI.DAG; local
1392 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
[all...] |
| /netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 396 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
411 SelectionDAG &DAG = CLI.DAG; local
437 LowerCCCArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
596 LowerCCCCallTo( SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool IsVarArg, bool , const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
774 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
801 IntCondCCodeToICC(SDValue CC, const SDLoc &DL, SDValue &RHS, SelectionDAG &DAG) argument
1347 isConditionalZeroOrAllOnes(SDNode *N, bool AllOnes, SDValue &CC, bool &Invert, SDValue &OtherOp, SelectionDAG &DAG) argument
1421 SelectionDAG &DAG = DCI.DAG; local
1488 computeKnownBitsForTargetNode( const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const argument
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