Searched defs:CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC (Results 1 - 14 of 14) sorted by relevance

/u-boot/board/altera/arria5-socdk/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/altera/cyclone5-socdk/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/aries/mcvevk/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/devboards/dbm-soc1/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/ebv/socrates/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/is1/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/keymile/secu1/qts/
H A Dsdram_config.h53 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 3 macro
/u-boot/board/terasic/de0-nano-soc/qts/
H A Dsdram_config.h45 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/sr1500/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/softing/vining_fpga/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/terasic/de10-standard/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 2 macro
/u-boot/board/terasic/de1-soc/qts/
H A Dsdram_config.h32 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro
/u-boot/board/terasic/de10-nano/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 2 macro
/u-boot/board/terasic/sockit/qts/
H A Dsdram_config.h52 #define CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 0 macro

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