| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 181 bool CallLowering::handleAssignments(CCState &CCInfo, argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.cpp | 241 isEligibleForTailCallOptimization( const CCState &CCInfo, unsigned NextStackOffset, const MipsFunctionInfo &FI) const argument
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| H A D | MipsSEISelLowering.cpp | 1143 isEligibleForTailCallOptimization( const CCState &CCInfo, unsigned NextStackOffset, const MipsFunctionInfo &FI) const argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 385 static void allocateHSAUserSGPRs(CCState &CCInfo, argument
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| H A D | SIISelLowering.cpp | 108 static unsigned findFirstFreeSGPR(CCState &CCInfo) { argument
1623 void SITargetLowering::allocateSpecialEntryInputVGPRs(CCState &CCInfo, argument
1659 static ArgDescriptor allocateVGPR32Input(CCState &CCInfo, unsigned Mask = ~0u, argument
1684 allocateSGPR32InputImpl(CCState &CCInfo, const TargetRegisterClass *RC, unsigned NumArgRegs) argument
1701 allocateSGPR32Input(CCState &CCInfo) argument
1705 allocateSGPR64Input(CCState &CCInfo) argument
1709 allocateSpecialInputVGPRs(CCState &CCInfo, MachineFunction &MF, const SIRegisterInfo &TRI, SIMachineFunctionInfo &Info) const argument
1730 allocateSpecialInputSGPRs( CCState &CCInfo, MachineFunction &MF, const SIRegisterInfo &TRI, SIMachineFunctionInfo &Info) const argument
1767 allocateHSAUserSGPRs(CCState &CCInfo, MachineFunction &MF, const SIRegisterInfo &TRI, SIMachineFunctionInfo &Info) const argument
1822 allocateSystemSGPRs(CCState &CCInfo, MachineFunction &MF, SIMachineFunctionInfo &Info, CallingConv::ID CallConv, bool IsShader) const argument
2436 passSpecialInputs( CallLoweringInfo &CLI, CCState &CCInfo, const SIMachineFunctionInfo &Info, SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue Chain) const argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 932 analyzeStandardArguments(TargetLowering::CallLoweringInfo *CLI, const Function *F, const DataLayout *TD, const SmallVectorImpl<ISD::OutputArg> *Outs, const SmallVectorImpl<ISD::InputArg> *Ins, CallingConv::ID CallConv, SmallVectorImpl<CCValAssign> &ArgLocs, CCState &CCInfo, bool IsCall, bool IsVarArg) argument
1008 analyzeBuiltinArguments(TargetLowering::CallLoweringInfo &CLI, const Function *F, const DataLayout *TD, const SmallVectorImpl<ISD::OutputArg> *Outs, const SmallVectorImpl<ISD::InputArg> *Ins, CallingConv::ID CallConv, SmallVectorImpl<CCValAssign> &ArgLocs, CCState &CCInfo, bool IsCall, bool IsVarArg) argument
1026 analyzeArguments(TargetLowering::CallLoweringInfo *CLI, const Function *F, const DataLayout *TD, const SmallVectorImpl<ISD::OutputArg> *Outs, const SmallVectorImpl<ISD::InputArg> *Ins, CallingConv::ID CallConv, SmallVectorImpl<CCValAssign> &ArgLocs, CCState &CCInfo, bool IsCall, bool IsVarArg) argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1664 analyzeInputArgs( MachineFunction &MF, CCState &CCInfo, const SmallVectorImpl<ISD::InputArg> &Ins, bool IsRet) const argument
1690 analyzeOutputArgs( MachineFunction &MF, CCState &CCInfo, const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsRet, CallLoweringInfo *CLI) const argument
2057 isEligibleForTailCallOptimization( CCState &CCInfo, CallLoweringInfo &CLI, MachineFunction &MF, const SmallVector<CCValAssign, 16> &ArgLocs) const argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 4475 unsigned CCInfo = Record[OpNum++]; local
4558 unsigned CCInfo = Record[OpNum++]; local
4997 unsigned CCInfo = Record[OpNum++]; local
[all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3587 void AArch64TargetLowering::saveVarArgRegisters(CCState &CCInfo, argument
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 3911 StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG, const SDLoc &dl, SDValue &Chain, const Value *OrigArg, unsigned InRegsParamRecordIdx, int ArgOffset, unsigned ArgSize) const argument
3965 VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG, const SDLoc &dl, SDValue &Chain, unsigned ArgOffset, unsigned TotalArgRegsSaveSize, bool ForceMutable) const argument
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