| /freebsd-10-stable/contrib/llvm/lib/Target/X86/InstPrinter/ |
| H A D | X86ATTInstPrinter.cpp | 175 const MCOperand &BaseReg = MI->getOperand(Op); local
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| H A D | X86IntelInstPrinter.cpp | 154 const MCOperand &BaseReg = MI->getOperand(Op); local
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| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 140 unsigned BaseReg = local
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/InstPrinter/ |
| H A D | ARMInstPrinter.cpp | 246 unsigned BaseReg = MI->getOperand(0).getReg(); local
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 213 emitT2RegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const ARMBaseInstrInfo &TII, unsigned MIFlags) argument
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| H A D | Thumb1RegisterInfo.cpp | 90 emitThumbRegPlusImmInReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, bool CanChangeCC, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags = MachineInstr::NoFlags) argument
167 emitThumbRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags) argument
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| H A D | ARMBaseRegisterInfo.cpp | 568 materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const argument
594 resolveFrameIndex(MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const argument
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| H A D | Thumb2SizeReduction.cpp | 420 unsigned BaseReg = MI->getOperand(0).getReg(); local
442 unsigned BaseReg = MI->getOperand(1).getReg(); local
456 unsigned BaseReg = MI->getOperand(1).getReg(); local
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| H A D | ARMConstantIslandPass.cpp | 1880 unsigned BaseReg = MI->getOperand(0).getReg(); local
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| H A D | ARMLoadStoreOptimizer.cpp | 1183 unsigned BaseReg = BaseOp.getReg(); local
1152 InsertLDR_STR(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int Offset, bool isDef, DebugLoc dl, unsigned NewOpc, unsigned Reg, bool RegDeadKill, bool RegUndef, unsigned BaseReg, bool BaseKill, bool BaseUndef, bool OffKill, bool OffUndef, ARMCC::CondCodes Pred, unsigned PredReg, const TargetInstrInfo *TII, bool isT2) argument
1655 CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl, unsigned &NewOpc, unsigned &EvenReg, unsigned &OddReg, unsigned &BaseReg, int &Offset, unsigned &PredReg, ARMCC::CondCodes &Pred, bool &isT2) argument
1821 unsigned BaseReg = 0, PredReg = 0; local
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| H A D | ARMISelDAGToDAG.cpp | 1242 bool ARMDAGToDAGISel::SelectT2ShifterOperandReg(SDValue N, SDValue &BaseReg, argument
468 SelectImmShifterOperand(SDValue N, SDValue &BaseReg, SDValue &Opc, bool CheckProfitability) argument
491 SelectRegShifterOperand(SDValue N, SDValue &BaseReg, SDValue &ShReg, SDValue &Opc, bool CheckProfitability) argument
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| H A D | ARMBaseInstrInfo.cpp | 159 unsigned BaseReg = Base.getReg(); local
1824 emitARMRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const ARMBaseInstrInfo &TII, unsigned MIFlags) argument
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| H A D | LocalStackSlotAllocation.cpp | 271 unsigned BaseReg = 0; local
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| H A D | MachineScheduler.cpp | 987 unsigned BaseReg; member in struct:__anon2::LoadClusterMutation::LoadInfo
1021 unsigned BaseReg; local
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| H A D | X86AsmPrinter.cpp | 272 const MachineOperand &BaseReg = MI->getOperand(Op); local
331 const MachineOperand &BaseReg = MI->getOperand(Op); local
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| H A D | X86InstrInfo.cpp | 1619 static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) { argument
1675 unsigned BaseReg = MI->getOperand(1).getReg(); local
1696 unsigned BaseReg = MI->getOperand(1).getReg(); local
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 795 materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const argument
816 resolveFrameIndex(MachineBasicBlock::iterator I, unsigned BaseReg, int64_t Offset) const argument
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| /freebsd-10-stable/contrib/llvm/tools/clang/lib/StaticAnalyzer/Core/ |
| H A D | Store.cpp | 285 const MemRegion *BaseReg = local
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| /freebsd-10-stable/contrib/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 462 SelectGlobalValueVariableOffset(SDValue Addr, SDValue& BaseReg, SDValue &Offset) argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 374 unsigned BaseReg local
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| /freebsd-10-stable/contrib/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 629 getLdStBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg, unsigned &Offset, const TargetRegisterInfo *TRI) const argument
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| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 495 unsigned BaseReg = 0; local
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| /freebsd-10-stable/contrib/llvm/lib/Transforms/Scalar/ |
| H A D | CodeGenPrepare.cpp | 822 Value *BaseReg; member in struct:__anon2759::ExtAddrMode
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| H A D | LoopStrengthReduce.cpp | 937 const SCEV *BaseReg = *I; local
3200 const SCEV *BaseReg local
3283 const SCEV *BaseReg = *I; local
3697 const SCEV *BaseReg = F.BaseRegs[N]; local
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 204 unsigned BaseReg, IndexReg, TmpReg, Scale; member in class:__anon2640::X86AsmParser::IntelExprStateMachine
642 unsigned BaseReg; member in struct:__anon2641::X86Operand::MemOp
1000 CreateMem(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, unsigned Scale, SMLoc StartLoc, SMLoc EndLoc, unsigned Size = 0, StringRef SymName = StringRef(), void *OpDecl = 0) argument
1179 CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, unsigned Scale, SMLoc Start, SMLoc End, unsigned Size, StringRef Identifier, InlineAsmIdentifierInfo &Info) argument
1412 int BaseReg = SM.getBaseReg(); local
1824 unsigned BaseReg = 0, IndexReg = 0, Scale = 1; local
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