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| H A D | mdio-mscc-miim.c | diff 74529db3 Fri Mar 18 14:13:24 MDT 2022 Michael Walle <michael@walle.cc> net: mdio: mscc-miim: add lan966x internal phy reset support The LAN966x has two internal PHYs which are in reset by default. The driver already supported the internal PHYs of the SparX-5. Now add support for the LAN966x, too. Add a new compatible to distinguish them. The LAN966x has additional control bits in this register, thus convert the regmap_write() to regmap_update_bits() to leave the remaining bits untouched. This doesn't change anything for the SparX-5 SoC, because there, the register consists only of reset bits. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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