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| /linux-master/drivers/clk/renesas/ | ||
| H A D | r8a779f0-cpg-mssr.c | diff d1b32a83 Thu Jan 25 08:45:13 MST 2024 Geert Uytterhoeven <geert+renesas@glider.be> clk: renesas: r8a779f0: Correct PFC/GPIO parent clock According to the R-Car S4 Series Hardware User’s Manual Rev.0.81, the parent clock of the Pin Function (PFC/GPIO) module clock is the CP clock. As this clock is not documented to exist on R-Car S4, use the CPEX clock instead. Fixes: 73421f2a48e6bd1d ("clk: renesas: r8a779f0: Add PFC clock") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f88ec4aede0eaf0107c8bb7b28ba719ac6cd418f.1706197415.git.geert+renesas@glider.be diff 73421f2a Mon Feb 21 08:35:56 MST 2022 Geert Uytterhoeven <geert+renesas@glider.be> clk: renesas: r8a779f0: Add PFC clock Add the module clock used by the Pin Function (PFC/GPIO) controller on the Renesas R-Car S4-8 (R8A779F0) SoC. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/4ef3d3dfe714ad75112e4886efea0b66e40a33bc.1645457502.git.geert+renesas@glider.be |
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