Searched hist:15273 (Results 1 - 7 of 7) sorted by relevance
| /linux-master/drivers/clk/tegra/ | ||
| H A D | clk-dfll.h | d8d7a08f Wed May 13 08:58:36 MDT 2015 Tuomas Tynkkynen <ttynkkynen@nvidia.com> clk: tegra: Add library for the DFLL clock source (open-loop mode) Add shared code to support the Tegra DFLL clocksource in open-loop mode. This root clocksource is present on the Tegra124 SoCs. The DFLL is the intended primary clock source for the fast CPU cluster. This code is very closely based on a patch by Paul Walmsley from December (http://comments.gmane.org/gmane.linux.ports.tegra/15273), which in turn comes from the internal driver by originally created by Aleksandr Frid <afrid@nvidia.com>. Subsequent patches will add support for closed loop mode and drivers for the Tegra124 fast CPU cluster DFLL devices, which rely on this code. Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
| H A D | Makefile | diff d8d7a08f Wed May 13 08:58:36 MDT 2015 Tuomas Tynkkynen <ttynkkynen@nvidia.com> clk: tegra: Add library for the DFLL clock source (open-loop mode) Add shared code to support the Tegra DFLL clocksource in open-loop mode. This root clocksource is present on the Tegra124 SoCs. The DFLL is the intended primary clock source for the fast CPU cluster. This code is very closely based on a patch by Paul Walmsley from December (http://comments.gmane.org/gmane.linux.ports.tegra/15273), which in turn comes from the internal driver by originally created by Aleksandr Frid <afrid@nvidia.com>. Subsequent patches will add support for closed loop mode and drivers for the Tegra124 fast CPU cluster DFLL devices, which rely on this code. Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
| H A D | clk-dfll.c | d8d7a08f Wed May 13 08:58:36 MDT 2015 Tuomas Tynkkynen <ttynkkynen@nvidia.com> clk: tegra: Add library for the DFLL clock source (open-loop mode) Add shared code to support the Tegra DFLL clocksource in open-loop mode. This root clocksource is present on the Tegra124 SoCs. The DFLL is the intended primary clock source for the fast CPU cluster. This code is very closely based on a patch by Paul Walmsley from December (http://comments.gmane.org/gmane.linux.ports.tegra/15273), which in turn comes from the internal driver by originally created by Aleksandr Frid <afrid@nvidia.com>. Subsequent patches will add support for closed loop mode and drivers for the Tegra124 fast CPU cluster DFLL devices, which rely on this code. Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
| /linux-master/Documentation/devicetree/bindings/net/wireless/ | ||
| H A D | microchip,wilc1000.yaml | diff 15273b7b Wed Jul 27 10:41:30 MDT 2022 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> dt-bindings: wireless: use spi-peripheral-props.yaml Instead of listing directly properties typical for SPI peripherals, reference the spi-peripheral-props.yaml schema. This allows using all properties typical for SPI-connected devices, even these which device bindings author did not tried yet. Remove the spi-* properties which now come via spi-peripheral-props.yaml schema, except for the cases when device schema adds some constraints like maximum frequency. While changing additionalProperties->unevaluatedProperties, put it in typical place, just before example DTS. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220727164130.385411-2-krzysztof.kozlowski@linaro.org |
| H A D | ti,wlcore.yaml | diff 15273b7b Wed Jul 27 10:41:30 MDT 2022 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> dt-bindings: wireless: use spi-peripheral-props.yaml Instead of listing directly properties typical for SPI peripherals, reference the spi-peripheral-props.yaml schema. This allows using all properties typical for SPI-connected devices, even these which device bindings author did not tried yet. Remove the spi-* properties which now come via spi-peripheral-props.yaml schema, except for the cases when device schema adds some constraints like maximum frequency. While changing additionalProperties->unevaluatedProperties, put it in typical place, just before example DTS. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220727164130.385411-2-krzysztof.kozlowski@linaro.org |
| H A D | silabs,wfx.yaml | diff 15273b7b Wed Jul 27 10:41:30 MDT 2022 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> dt-bindings: wireless: use spi-peripheral-props.yaml Instead of listing directly properties typical for SPI peripherals, reference the spi-peripheral-props.yaml schema. This allows using all properties typical for SPI-connected devices, even these which device bindings author did not tried yet. Remove the spi-* properties which now come via spi-peripheral-props.yaml schema, except for the cases when device schema adds some constraints like maximum frequency. While changing additionalProperties->unevaluatedProperties, put it in typical place, just before example DTS. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220727164130.385411-2-krzysztof.kozlowski@linaro.org |
| /linux-master/drivers/gpu/drm/msm/adreno/ | ||
| H A D | a6xx_gpu.c | diff 15273ffd Wed May 08 07:06:52 MDT 2019 Rob Clark <robdclark@chromium.org> drm/msm/a6xx: No zap shader is not an error Depending on platform firmware, a zap shader may not be required to take the GPU out of secure mode on boot, in which case we can just write RBBM_SECVID_TRUST_CNTL directly. Which we *mostly* handled, but missed clearing 'ret' resulting that hw_init() returned an error on these devices. Fixes: abccb9fe3267 ("drm/msm/a6xx: Add zap shader load") Acked-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190508130726.27557-1-robdclark@gmail.com |
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