Searched hist:100966 (Results 1 - 13 of 13) sorted by relevance
| /linux-master/scripts/dtc/include-prefixes/arm64/arm/ | ||
| H A D | rtsm_ve-motherboard-rs2.dtsi | fa083b99 Fri Dec 14 04:35:07 MST 2018 Jean-Philippe Brucker <jean-philippe@linaro.org> arm64: dts: fast models: Add DTS fo Base RevC FVP Fixed Virtual Platforms(FVP) Base RevC model is an emulated Arm platform with GICv3, PCIe, SMMUv3 and various other features. These are available free of charge on the Arm Community website at Arm Development Platforms[1]. It resembles the Foundation Platform, which is a simple FVP that includes an Armv8‑A AEM processor model but this has two cluster of four cores, a CCI-550 interconnect, an SMMU and two PCI devices. In order to enable development of software, let's add a description of the Revison C version of Base platform. The documentation for this FVP model is available @[2] for reference. [1] https://community.arm.com/dev-platforms/ [2] https://static.docs.arm.com/100966/1104/fast_models_fvp_rg_100966_1104_00_en.pdf Cc: Vincent Stehlé <vincent.stehle@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> [sudeep.holla: aligned interrupt-map with other DTS, added SPE, changed PMU to use GIC PPI, moved to PSCI v0.2, commit log rewording] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
| H A D | fvp-base-revc.dts | fa083b99 Fri Dec 14 04:35:07 MST 2018 Jean-Philippe Brucker <jean-philippe@linaro.org> arm64: dts: fast models: Add DTS fo Base RevC FVP Fixed Virtual Platforms(FVP) Base RevC model is an emulated Arm platform with GICv3, PCIe, SMMUv3 and various other features. These are available free of charge on the Arm Community website at Arm Development Platforms[1]. It resembles the Foundation Platform, which is a simple FVP that includes an Armv8‑A AEM processor model but this has two cluster of four cores, a CCI-550 interconnect, an SMMU and two PCI devices. In order to enable development of software, let's add a description of the Revison C version of Base platform. The documentation for this FVP model is available @[2] for reference. [1] https://community.arm.com/dev-platforms/ [2] https://static.docs.arm.com/100966/1104/fast_models_fvp_rg_100966_1104_00_en.pdf Cc: Vincent Stehlé <vincent.stehle@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> [sudeep.holla: aligned interrupt-map with other DTS, added SPE, changed PMU to use GIC PPI, moved to PSCI v0.2, commit log rewording] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
| H A D | Makefile | diff fa083b99 Fri Dec 14 04:35:07 MST 2018 Jean-Philippe Brucker <jean-philippe@linaro.org> arm64: dts: fast models: Add DTS fo Base RevC FVP Fixed Virtual Platforms(FVP) Base RevC model is an emulated Arm platform with GICv3, PCIe, SMMUv3 and various other features. These are available free of charge on the Arm Community website at Arm Development Platforms[1]. It resembles the Foundation Platform, which is a simple FVP that includes an Armv8‑A AEM processor model but this has two cluster of four cores, a CCI-550 interconnect, an SMMU and two PCI devices. In order to enable development of software, let's add a description of the Revison C version of Base platform. The documentation for this FVP model is available @[2] for reference. [1] https://community.arm.com/dev-platforms/ [2] https://static.docs.arm.com/100966/1104/fast_models_fvp_rg_100966_1104_00_en.pdf Cc: Vincent Stehlé <vincent.stehle@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> [sudeep.holla: aligned interrupt-map with other DTS, added SPE, changed PMU to use GIC PPI, moved to PSCI v0.2, commit log rewording] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
| /linux-master/arch/arm64/boot/dts/arm/ | ||
| H A D | rtsm_ve-motherboard-rs2.dtsi | fa083b99 Fri Dec 14 04:35:07 MST 2018 Jean-Philippe Brucker <jean-philippe@linaro.org> arm64: dts: fast models: Add DTS fo Base RevC FVP Fixed Virtual Platforms(FVP) Base RevC model is an emulated Arm platform with GICv3, PCIe, SMMUv3 and various other features. These are available free of charge on the Arm Community website at Arm Development Platforms[1]. It resembles the Foundation Platform, which is a simple FVP that includes an Armv8‑A AEM processor model but this has two cluster of four cores, a CCI-550 interconnect, an SMMU and two PCI devices. In order to enable development of software, let's add a description of the Revison C version of Base platform. The documentation for this FVP model is available @[2] for reference. [1] https://community.arm.com/dev-platforms/ [2] https://static.docs.arm.com/100966/1104/fast_models_fvp_rg_100966_1104_00_en.pdf Cc: Vincent Stehlé <vincent.stehle@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> [sudeep.holla: aligned interrupt-map with other DTS, added SPE, changed PMU to use GIC PPI, moved to PSCI v0.2, commit log rewording] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
| H A D | fvp-base-revc.dts | fa083b99 Fri Dec 14 04:35:07 MST 2018 Jean-Philippe Brucker <jean-philippe@linaro.org> arm64: dts: fast models: Add DTS fo Base RevC FVP Fixed Virtual Platforms(FVP) Base RevC model is an emulated Arm platform with GICv3, PCIe, SMMUv3 and various other features. These are available free of charge on the Arm Community website at Arm Development Platforms[1]. It resembles the Foundation Platform, which is a simple FVP that includes an Armv8‑A AEM processor model but this has two cluster of four cores, a CCI-550 interconnect, an SMMU and two PCI devices. In order to enable development of software, let's add a description of the Revison C version of Base platform. The documentation for this FVP model is available @[2] for reference. [1] https://community.arm.com/dev-platforms/ [2] https://static.docs.arm.com/100966/1104/fast_models_fvp_rg_100966_1104_00_en.pdf Cc: Vincent Stehlé <vincent.stehle@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> [sudeep.holla: aligned interrupt-map with other DTS, added SPE, changed PMU to use GIC PPI, moved to PSCI v0.2, commit log rewording] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
| H A D | Makefile | diff fa083b99 Fri Dec 14 04:35:07 MST 2018 Jean-Philippe Brucker <jean-philippe@linaro.org> arm64: dts: fast models: Add DTS fo Base RevC FVP Fixed Virtual Platforms(FVP) Base RevC model is an emulated Arm platform with GICv3, PCIe, SMMUv3 and various other features. These are available free of charge on the Arm Community website at Arm Development Platforms[1]. It resembles the Foundation Platform, which is a simple FVP that includes an Armv8‑A AEM processor model but this has two cluster of four cores, a CCI-550 interconnect, an SMMU and two PCI devices. In order to enable development of software, let's add a description of the Revison C version of Base platform. The documentation for this FVP model is available @[2] for reference. [1] https://community.arm.com/dev-platforms/ [2] https://static.docs.arm.com/100966/1104/fast_models_fvp_rg_100966_1104_00_en.pdf Cc: Vincent Stehlé <vincent.stehle@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> [sudeep.holla: aligned interrupt-map with other DTS, added SPE, changed PMU to use GIC PPI, moved to PSCI v0.2, commit log rewording] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
| /linux-master/drivers/gpu/drm/amd/amdgpu/ | ||
| H A D | gmc_v11_0.c | diff bff3315b Tue Nov 07 12:07:44 MST 2023 Alex Deucher <alexander.deucher@amd.com> drm/amdgpu: fix AGP init order The default AGP settings were overwriting the IP selected ones since the default was getting set after the IP ones were selected. Fixes: de59b69932e6 ("drm/amdgpu/gmc: set a default disable value for AGP") Link: https://lists.freedesktop.org/archives/amd-gfx/2023-November/100966.html Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> |
| H A D | gmc_v6_0.c | diff bff3315b Tue Nov 07 12:07:44 MST 2023 Alex Deucher <alexander.deucher@amd.com> drm/amdgpu: fix AGP init order The default AGP settings were overwriting the IP selected ones since the default was getting set after the IP ones were selected. Fixes: de59b69932e6 ("drm/amdgpu/gmc: set a default disable value for AGP") Link: https://lists.freedesktop.org/archives/amd-gfx/2023-November/100966.html Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> |
| H A D | gmc_v10_0.c | diff bff3315b Tue Nov 07 12:07:44 MST 2023 Alex Deucher <alexander.deucher@amd.com> drm/amdgpu: fix AGP init order The default AGP settings were overwriting the IP selected ones since the default was getting set after the IP ones were selected. Fixes: de59b69932e6 ("drm/amdgpu/gmc: set a default disable value for AGP") Link: https://lists.freedesktop.org/archives/amd-gfx/2023-November/100966.html Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> |
| H A D | gmc_v8_0.c | diff bff3315b Tue Nov 07 12:07:44 MST 2023 Alex Deucher <alexander.deucher@amd.com> drm/amdgpu: fix AGP init order The default AGP settings were overwriting the IP selected ones since the default was getting set after the IP ones were selected. Fixes: de59b69932e6 ("drm/amdgpu/gmc: set a default disable value for AGP") Link: https://lists.freedesktop.org/archives/amd-gfx/2023-November/100966.html Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> |
| H A D | gmc_v7_0.c | diff bff3315b Tue Nov 07 12:07:44 MST 2023 Alex Deucher <alexander.deucher@amd.com> drm/amdgpu: fix AGP init order The default AGP settings were overwriting the IP selected ones since the default was getting set after the IP ones were selected. Fixes: de59b69932e6 ("drm/amdgpu/gmc: set a default disable value for AGP") Link: https://lists.freedesktop.org/archives/amd-gfx/2023-November/100966.html Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> |
| H A D | amdgpu_object.c | diff bff3315b Tue Nov 07 12:07:44 MST 2023 Alex Deucher <alexander.deucher@amd.com> drm/amdgpu: fix AGP init order The default AGP settings were overwriting the IP selected ones since the default was getting set after the IP ones were selected. Fixes: de59b69932e6 ("drm/amdgpu/gmc: set a default disable value for AGP") Link: https://lists.freedesktop.org/archives/amd-gfx/2023-November/100966.html Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> |
| H A D | gmc_v9_0.c | diff bff3315b Tue Nov 07 12:07:44 MST 2023 Alex Deucher <alexander.deucher@amd.com> drm/amdgpu: fix AGP init order The default AGP settings were overwriting the IP selected ones since the default was getting set after the IP ones were selected. Fixes: de59b69932e6 ("drm/amdgpu/gmc: set a default disable value for AGP") Link: https://lists.freedesktop.org/archives/amd-gfx/2023-November/100966.html Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> |
Completed in 388 milliseconds