| /freebsd-10.1-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsTargetMachine.cpp | 56 MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument
118 MipsebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
127 MipselTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| H A D | MipsTargetStreamer.h | 27 formatted_raw_ostream &OS; member in class:llvm::MipsTargetAsmStreamer
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| /freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/InstPrinter/ |
| H A D | NVPTXInstPrinter.cpp | 38 void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { argument
73 void NVPTXInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/MCTargetDesc/ |
| H A D | NVPTXMCTargetDesc.cpp | 48 createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) { argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTX.h | 161 LS, enumerator in enum:llvm::NVPTX::PTXCmpMode::CmpMode
163 HS, enumerator in enum:llvm::NVPTX::PTXCmpMode::CmpMode
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| H A D | NVPTXISelLowering.cpp | 531 ImmutableCallSite *CS = CLI.CS; local
471 getArgumentAlignment(SDValue Callee, const ImmutableCallSite *CS, Type *Ty, unsigned Idx) const argument
[all...] |
| H A D | NVPTXSection.h | 34 PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS, const MCExpr *Subsection) const argument
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| H A D | NVPTXSubtarget.cpp | 26 NVPTXSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) argument
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| H A D | NVPTXTargetMachine.cpp | 66 NVPTXTargetMachine( const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument
80 NVPTXTargetMachine32( const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
88 NVPTXTargetMachine64( const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/PowerPC/InstPrinter/ |
| H A D | PPCInstPrinter.cpp | 34 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCELFObjectWriter.cpp | 414 MCObjectWriter *llvm::createPPCELFObjectWriter(raw_ostream &OS, argument
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| H A D | PPCMCCodeEmitter.cpp | 78 void EncodeInstruction(const MCInst &MI, raw_ostream &OS, argument
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| H A D | PPCMCTargetDesc.cpp | 112 formatted_raw_ostream &OS; member in class:__anon2540::PPCTargetAsmStreamer
115 PPCTargetAsmStreamer(formatted_raw_ostream &OS) : OS(OS) {} argument
61 createPPCMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
134 createMCStreamer(const Target &T, StringRef TT, MCContext &Ctx, MCAsmBackend &MAB, raw_ostream &OS, MCCodeEmitter *Emitter, bool RelaxAll, bool NoExecStack) argument
148 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS, bool isVerboseAsm, bool useLoc, bool useCFI, bool useDwarfDirectory, MCInstPrinter *InstPrint, MCCodeEmitter *CE, MCAsmBackend *TAB, bool ShowInst) argument
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| H A D | PPCMachObjectWriter.cpp | 383 MCObjectWriter *llvm::createPPCMachObjectWriter(raw_ostream &OS, bool Is64Bit, argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCAsmPrinter.cpp | 768 PPCTargetStreamer &TS = local
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| H A D | PPCISelLowering.cpp | 6875 static bool isConsecutiveLS(LSBaseSDNode *LS, LSBaseSDNode *Base, argument
6890 int FS = MFI->getObjectSize(FI); local
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| H A D | PPCSubtarget.cpp | 62 std::string FS = local
99 void PPCSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) { argument
33 PPCSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) argument
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| H A D | PPCTargetMachine.cpp | 73 PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64Bit) argument
94 PPC32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
104 PPC64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/R600/ |
| H A D | AMDGPUSubtarget.cpp | 24 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : argument
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| H A D | AMDGPUTargetMachine.cpp | 52 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OptLevel ) argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/R600/InstPrinter/ |
| H A D | AMDGPUInstPrinter.cpp | 18 void AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, argument
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| /freebsd-10.1-release/contrib/llvm/lib/Target/R600/MCTargetDesc/ |
| H A D | AMDGPUAsmBackend.cpp | 25 AMDGPUMCObjectWriter(raw_ostream &OS) : MCObjectWriter(OS, true) { } argument
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| H A D | AMDGPUELFObjectWriter.cpp | 36 MCObjectWriter *llvm::createAMDGPUELFObjectWriter(raw_ostream &OS) { argument
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| H A D | AMDGPUMCTargetDesc.cpp | 50 createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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| H A D | R600MCCodeEmitter.cpp | 89 void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, argument
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