/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTargetMachine.cpp | 152 SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ |
H A D | TargetMachine.cpp | 34 TargetMachine(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
H A D | WebAssemblyMCTargetDesc.cpp | 37 createMCAsmInfo(const MCRegisterInfo & , const Triple &TT, const MCTargetOptions &Options) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/MCTargetDesc/ |
H A D | XCoreMCTargetDesc.cpp | 57 createXCoreMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT, const MCTargetOptions &Options) argument
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/freebsd-13-stable/contrib/llvm-project/lldb/include/lldb/Interpreter/ |
H A D | Options.h | 62 class Options { class in namespace:lldb_private [all...] |
/freebsd-13-stable/contrib/llvm-project/compiler-rt/lib/fuzzer/ |
H A D | FuzzerMutate.cpp | 26 MutationDispatcher(Random &Rand, const FuzzingOptions &Options) argument
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H A D | FuzzerUtilPosix.cpp | 114 void SetSignalHandler(const FuzzingOptions& Options) { argument [all...] |
H A D | FuzzerUtilWindows.cpp | 115 void SetSignalHandler(const FuzzingOptions& Options) { argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/MCDisassembler/ |
H A D | Disassembler.cpp | 302 int LLVMSetDisasmOptions(LLVMDisasmContextRef DCR, uint64_t Options){ argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/ObjectYAML/ |
H A D | CodeViewYAMLTypes.cpp | 327 bitset(IO &IO, PointerOptions &Options) argument 339 bitset(IO &IO, ModifierOptions &Options) argument 347 bitset(IO &IO, FunctionOptions &Options) argument 356 bitset(IO &IO, ClassOptions &Options) argument 376 bitset(IO &IO, MethodOptions &Options) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
H A D | PassManagerBuilder.cpp | 341 InstrProfOptions Options; local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | BreakCriticalEdges.cpp | 138 SplitCriticalEdge(Instruction *TI, unsigned SuccNum, const CriticalEdgeSplittingOptions &Options) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/tools/llc/ |
H A D | llc.cpp | 427 TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags(); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/tools/lli/ |
H A D | lli.cpp | 479 TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/tools/llvm-cov/ |
H A D | SourceCoverageView.cpp | 139 create(StringRef SourceName, const MemoryBuffer &File, const CoverageViewOptions &Options, CoverageData &&CoverageInfo) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/tools/opt/ |
H A D | opt.cpp | 703 const TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags(); local 472 GetTargetMachine(Triple TheTriple, StringRef CPUStr, StringRef FeaturesStr, const TargetOptions &Options) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMTargetMachine.cpp | 114 computeTargetABI(const Triple &TT, StringRef CPU, const TargetOptions &Options) argument 132 computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) argument 208 ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool isLittle) argument 311 ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument 319 ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 208 createARMMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TheTriple, const MCTargetOptions &Options) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonAsmBackend.cpp | 772 createHexagonAsmBackend(Target const &T, const MCSubtargetInfo &STI, MCRegisterInfo const & , const MCTargetOptions &Options) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsTargetMachine.cpp | 63 computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) argument 111 MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool isLittle) argument 143 MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument 153 MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXTargetMachine.cpp | 107 NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool is64bit) argument 134 NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument 144 NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCTargetDesc.cpp | 83 createPPCMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TheTriple, const MCTargetOptions &Options) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/LTO/ |
H A D | Config.h | 42 TargetOptions Options; member in struct:llvm::lto::Config
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/LTO/legacy/ |
H A D | LTOCodeGenerator.h | 233 TargetOptions Options; member in struct:llvm::LTOCodeGenerator
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H A D | ThinLTOCodeGenerator.h | 40 TargetOptions Options; member in struct:llvm::TargetMachineBuilder 206 void setTargetOptions(TargetOptions Options) { argument
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