/* SPDX-License-Identifier: GPL-2.0 * * Copyright 2016-2018 HabanaLabs, Ltd. * All Rights Reserved. * */ /************************************ ** This is an auto-generated file ** ** DO NOT EDIT BELOW ** ************************************/ #ifndef ASIC_REG_SIF_RTR_CTRL_3_REGS_H_ #define ASIC_REG_SIF_RTR_CTRL_3_REGS_H_ /* ***************************************** * SIF_RTR_CTRL_3 (Prototype: RTR_CTRL) ***************************************** */ #define mmSIF_RTR_CTRL_3_PERM_SEL 0x336108 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_0 0x336114 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_1 0x336118 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_2 0x33611C #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_3 0x336120 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_4 0x336124 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_5 0x336128 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_6 0x33612C #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_7 0x336130 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_8 0x336134 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_9 0x336138 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_10 0x33613C #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_11 0x336140 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_12 0x336144 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_13 0x336148 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_14 0x33614C #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_15 0x336150 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_16 0x336154 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_17 0x336158 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_18 0x33615C #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_19 0x336160 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_20 0x336164 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_21 0x336168 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_22 0x33616C #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_23 0x336170 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_24 0x336174 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_25 0x336178 #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_26 0x33617C #define mmSIF_RTR_CTRL_3_HBM_POLY_H3_27 0x336180 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_0 0x336184 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_1 0x336188 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_2 0x33618C #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_3 0x336190 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_4 0x336194 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_5 0x336198 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_6 0x33619C #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_7 0x3361A0 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_8 0x3361A4 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_9 0x3361A8 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_10 0x3361AC #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_11 0x3361B0 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_12 0x3361B4 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_13 0x3361B8 #define mmSIF_RTR_CTRL_3_SRAM_POLY_H3_14 0x3361BC #define mmSIF_RTR_CTRL_3_SCRAM_SRAM_EN 0x33626C #define mmSIF_RTR_CTRL_3_RL_HBM_EN 0x336274 #define mmSIF_RTR_CTRL_3_RL_HBM_SAT 0x336278 #define mmSIF_RTR_CTRL_3_RL_HBM_RST 0x33627C #define mmSIF_RTR_CTRL_3_RL_HBM_TIMEOUT 0x336280 #define mmSIF_RTR_CTRL_3_SCRAM_HBM_EN 0x336284 #define mmSIF_RTR_CTRL_3_RL_PCI_EN 0x336288 #define mmSIF_RTR_CTRL_3_RL_PCI_SAT 0x33628C #define mmSIF_RTR_CTRL_3_RL_PCI_RST 0x336290 #define mmSIF_RTR_CTRL_3_RL_PCI_TIMEOUT 0x336294 #define mmSIF_RTR_CTRL_3_RL_SRAM_EN 0x33629C #define mmSIF_RTR_CTRL_3_RL_SRAM_SAT 0x3362A0 #define mmSIF_RTR_CTRL_3_RL_SRAM_RST 0x3362A4 #define mmSIF_RTR_CTRL_3_RL_SRAM_TIMEOUT 0x3362AC #define mmSIF_RTR_CTRL_3_RL_SRAM_RED 0x3362B4 #define mmSIF_RTR_CTRL_3_E2E_HBM_EN 0x3362EC #define mmSIF_RTR_CTRL_3_E2E_PCI_EN 0x3362F0 #define mmSIF_RTR_CTRL_3_E2E_HBM_WR_SIZE 0x3362F4 #define mmSIF_RTR_CTRL_3_E2E_PCI_WR_SIZE 0x3362F8 #define mmSIF_RTR_CTRL_3_E2E_AW_PCI_CTR_SET_EN 0x336404 #define mmSIF_RTR_CTRL_3_E2E_AW_PCI_CTR_SET 0x336408 #define mmSIF_RTR_CTRL_3_E2E_AW_PCI_CTR_WRAP 0x33640C #define mmSIF_RTR_CTRL_3_E2E_AW_PCI_CTR_CNT 0x336410 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM_CTR_SET_EN 0x336414 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM_CTR_SET 0x336418 #define mmSIF_RTR_CTRL_3_E2E_HBM_RD_SIZE 0x33641C #define mmSIF_RTR_CTRL_3_E2E_PCI_RD_SIZE 0x336420 #define mmSIF_RTR_CTRL_3_E2E_AR_PCI_CTR_SET_EN 0x336424 #define mmSIF_RTR_CTRL_3_E2E_AR_PCI_CTR_SET 0x336428 #define mmSIF_RTR_CTRL_3_E2E_AR_PCI_CTR_WRAP 0x33642C #define mmSIF_RTR_CTRL_3_E2E_AR_PCI_CTR_CNT 0x336430 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM_CTR_SET_EN 0x336434 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM_CTR_SET 0x336438 #define mmSIF_RTR_CTRL_3_NL_HBM_SEL_0 0x336450 #define mmSIF_RTR_CTRL_3_NL_HBM_SEL_1 0x336454 #define mmSIF_RTR_CTRL_3_NON_LIN_EN 0x336480 #define mmSIF_RTR_CTRL_3_NL_SRAM_BANK_0 0x336500 #define mmSIF_RTR_CTRL_3_NL_SRAM_BANK_1 0x336504 #define mmSIF_RTR_CTRL_3_NL_SRAM_BANK_2 0x336508 #define mmSIF_RTR_CTRL_3_NL_SRAM_BANK_3 0x33650C #define mmSIF_RTR_CTRL_3_NL_SRAM_BANK_4 0x336510 #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_0 0x336514 #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_1 0x336520 #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_2 0x336524 #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_3 0x336528 #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_4 0x33652C #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_5 0x336530 #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_6 0x336534 #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_7 0x336538 #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_8 0x33653C #define mmSIF_RTR_CTRL_3_NL_SRAM_OFFSET_9 0x336540 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_0 0x336550 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_1 0x336554 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_2 0x336558 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_3 0x33655C #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_4 0x336560 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_5 0x336564 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_6 0x336568 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_7 0x33656C #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_8 0x336570 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_9 0x336574 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_10 0x336578 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_11 0x33657C #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_12 0x336580 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_13 0x336584 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_14 0x336588 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_15 0x33658C #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_16 0x336590 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_17 0x336594 #define mmSIF_RTR_CTRL_3_NL_HBM_OFFSET_18 0x336598 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_0 0x3365E4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_1 0x3365E8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_2 0x3365EC #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_3 0x3365F0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_4 0x3365F4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_5 0x3365F8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_6 0x3365FC #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_7 0x336600 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_8 0x336604 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_9 0x336608 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_10 0x33660C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_11 0x336610 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_12 0x336614 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_13 0x336618 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_14 0x33661C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AW_15 0x336620 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_0 0x336624 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_1 0x336628 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_2 0x33662C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_3 0x336630 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_4 0x336634 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_5 0x336638 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_6 0x33663C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_7 0x336640 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_8 0x336644 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_9 0x336648 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_10 0x33664C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_11 0x336650 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_12 0x336654 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_13 0x336658 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_14 0x33665C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AW_15 0x336660 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_0 0x336664 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_1 0x336668 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_2 0x33666C #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_3 0x336670 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_4 0x336674 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_5 0x336678 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_6 0x33667C #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_7 0x336680 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_8 0x336684 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_9 0x336688 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_10 0x33668C #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_11 0x336690 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_12 0x336694 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_13 0x336698 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_14 0x33669C #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AW_15 0x3366A0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_0 0x3366A4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_1 0x3366A8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_2 0x3366AC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_3 0x3366B0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_4 0x3366B4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_5 0x3366B8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_6 0x3366BC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_7 0x3366C0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_8 0x3366C4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_9 0x3366C8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_10 0x3366CC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_11 0x3366D0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_12 0x3366D4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_13 0x3366D8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_14 0x3366DC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AW_15 0x3366E0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_0 0x3366E4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_1 0x3366E8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_2 0x3366EC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_3 0x3366F0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_4 0x3366F4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_5 0x3366F8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_6 0x3366FC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_7 0x336700 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_8 0x336704 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_9 0x336708 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_10 0x33670C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_11 0x336710 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_12 0x336714 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_13 0x336718 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_14 0x33671C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AW_15 0x336720 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_0 0x336724 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_1 0x336728 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_2 0x33672C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_3 0x336730 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_4 0x336734 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_5 0x336738 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_6 0x33673C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_7 0x336740 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_8 0x336744 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_9 0x336748 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_10 0x33674C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_11 0x336750 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_12 0x336754 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_13 0x336758 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_14 0x33675C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AW_15 0x336760 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_0 0x336764 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_1 0x336768 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_2 0x33676C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_3 0x336770 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_4 0x336774 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_5 0x336778 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_6 0x33677C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_7 0x336780 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_8 0x336784 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_9 0x336788 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_10 0x33678C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_11 0x336790 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_12 0x336794 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_13 0x336798 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_14 0x33679C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AW_15 0x3367A0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_0 0x3367A4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_1 0x3367A8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_2 0x3367AC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_3 0x3367B0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_4 0x3367B4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_5 0x3367B8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_6 0x3367BC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_7 0x3367C0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_8 0x3367C4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_9 0x3367C8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_10 0x3367CC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_11 0x3367D0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_12 0x3367D4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_13 0x3367D8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_14 0x3367DC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AW_15 0x3367E0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_0 0x336824 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_1 0x336828 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_2 0x33682C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_3 0x336830 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_4 0x336834 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_5 0x336838 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_6 0x33683C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_7 0x336840 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_8 0x336844 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_9 0x336848 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_10 0x33684C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_11 0x336850 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_12 0x336854 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_13 0x336858 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_14 0x33685C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_LOW_AR_15 0x336860 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_0 0x336864 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_1 0x336868 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_2 0x33686C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_3 0x336870 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_4 0x336874 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_5 0x336878 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_6 0x33687C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_7 0x336880 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_8 0x336884 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_9 0x336888 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_10 0x33688C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_11 0x336890 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_12 0x336894 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_13 0x336898 #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_14 0x33689C #define mmSIF_RTR_CTRL_3_RANGE_SEC_BASE_HIGH_AR_15 0x3368A0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_0 0x3368A4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_1 0x3368A8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_2 0x3368AC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_3 0x3368B0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_4 0x3368B4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_5 0x3368B8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_6 0x3368BC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_7 0x3368C0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_8 0x3368C4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_9 0x3368C8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_10 0x3368CC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_11 0x3368D0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_12 0x3368D4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_13 0x3368D8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_14 0x3368DC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_LOW_AR_15 0x3368E0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_0 0x3368E4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_1 0x3368E8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_2 0x3368EC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_3 0x3368F0 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_4 0x3368F4 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_5 0x3368F8 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_6 0x3368FC #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_7 0x336900 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_8 0x336904 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_9 0x336908 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_10 0x33690C #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_11 0x336910 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_12 0x336914 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_13 0x336918 #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_14 0x33691C #define mmSIF_RTR_CTRL_3_RANGE_SEC_MASK_HIGH_AR_15 0x336920 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_0 0x336924 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_1 0x336928 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_2 0x33692C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_3 0x336930 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_4 0x336934 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_5 0x336938 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_6 0x33693C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_7 0x336940 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_8 0x336944 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_9 0x336948 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_10 0x33694C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_11 0x336950 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_12 0x336954 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_13 0x336958 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_14 0x33695C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_LOW_AR_15 0x336960 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_0 0x336964 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_1 0x336968 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_2 0x33696C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_3 0x336970 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_4 0x336974 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_5 0x336978 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_6 0x33697C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_7 0x336980 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_8 0x336984 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_9 0x336988 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_10 0x33698C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_11 0x336990 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_12 0x336994 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_13 0x336998 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_14 0x33699C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_BASE_HIGH_AR_15 0x3369A0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_0 0x3369A4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_1 0x3369A8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_2 0x3369AC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_3 0x3369B0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_4 0x3369B4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_5 0x3369B8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_6 0x3369BC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_7 0x3369C0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_8 0x3369C4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_9 0x3369C8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_10 0x3369CC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_11 0x3369D0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_12 0x3369D4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_13 0x3369D8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_14 0x3369DC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_LOW_AR_15 0x3369E0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_0 0x3369E4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_1 0x3369E8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_2 0x3369EC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_3 0x3369F0 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_4 0x3369F4 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_5 0x3369F8 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_6 0x3369FC #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_7 0x336A00 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_8 0x336A04 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_9 0x336A08 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_10 0x336A0C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_11 0x336A10 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_12 0x336A14 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_13 0x336A18 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_14 0x336A1C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_MASK_HIGH_AR_15 0x336A20 #define mmSIF_RTR_CTRL_3_RANGE_SEC_HIT_AW 0x336A64 #define mmSIF_RTR_CTRL_3_RANGE_SEC_HIT_AR 0x336A68 #define mmSIF_RTR_CTRL_3_RANGE_PRIV_HIT_AW 0x336A6C #define mmSIF_RTR_CTRL_3_RANGE_PRIV_HIT_AR 0x336A70 #define mmSIF_RTR_CTRL_3_RGL_CFG 0x336B64 #define mmSIF_RTR_CTRL_3_RGL_SHIFT 0x336B68 #define mmSIF_RTR_CTRL_3_RGL_EXPECTED_LAT_0 0x336B6C #define mmSIF_RTR_CTRL_3_RGL_EXPECTED_LAT_1 0x336B70 #define mmSIF_RTR_CTRL_3_RGL_EXPECTED_LAT_2 0x336B74 #define mmSIF_RTR_CTRL_3_RGL_EXPECTED_LAT_3 0x336B78 #define mmSIF_RTR_CTRL_3_RGL_EXPECTED_LAT_4 0x336B7C #define mmSIF_RTR_CTRL_3_RGL_EXPECTED_LAT_5 0x336B80 #define mmSIF_RTR_CTRL_3_RGL_EXPECTED_LAT_6 0x336B84 #define mmSIF_RTR_CTRL_3_RGL_EXPECTED_LAT_7 0x336B88 #define mmSIF_RTR_CTRL_3_RGL_TOKEN_0 0x336BAC #define mmSIF_RTR_CTRL_3_RGL_TOKEN_1 0x336BB0 #define mmSIF_RTR_CTRL_3_RGL_TOKEN_2 0x336BB4 #define mmSIF_RTR_CTRL_3_RGL_TOKEN_3 0x336BB8 #define mmSIF_RTR_CTRL_3_RGL_TOKEN_4 0x336BBC #define mmSIF_RTR_CTRL_3_RGL_TOKEN_5 0x336BC0 #define mmSIF_RTR_CTRL_3_RGL_TOKEN_6 0x336BC4 #define mmSIF_RTR_CTRL_3_RGL_TOKEN_7 0x336BC8 #define mmSIF_RTR_CTRL_3_RGL_BANK_ID_0 0x336BEC #define mmSIF_RTR_CTRL_3_RGL_BANK_ID_1 0x336BF0 #define mmSIF_RTR_CTRL_3_RGL_BANK_ID_2 0x336BF4 #define mmSIF_RTR_CTRL_3_RGL_BANK_ID_3 0x336BF8 #define mmSIF_RTR_CTRL_3_RGL_BANK_ID_4 0x336BFC #define mmSIF_RTR_CTRL_3_RGL_BANK_ID_5 0x336C00 #define mmSIF_RTR_CTRL_3_RGL_BANK_ID_6 0x336C04 #define mmSIF_RTR_CTRL_3_RGL_BANK_ID_7 0x336C08 #define mmSIF_RTR_CTRL_3_RGL_WDT 0x336C2C #define mmSIF_RTR_CTRL_3_E2E_AR_HBM0_CH0_CTR_WRAP 0x336C30 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM0_CH1_CTR_WRAP 0x336C34 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM1_CH0_CTR_WRAP 0x336C38 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM1_CH1_CTR_WRAP 0x336C3C #define mmSIF_RTR_CTRL_3_E2E_AR_HBM2_CH0_CTR_WRAP 0x336C40 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM2_CH1_CTR_WRAP 0x336C44 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM3_CH0_CTR_WRAP 0x336C48 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM3_CH1_CTR_WRAP 0x336C4C #define mmSIF_RTR_CTRL_3_E2E_AR_HBM0_CH0_CTR_CNT 0x336C50 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM0_CH1_CTR_CNT 0x336C54 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM1_CH0_CTR_CNT 0x336C58 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM1_CH1_CTR_CNT 0x336C5C #define mmSIF_RTR_CTRL_3_E2E_AR_HBM2_CH0_CTR_CNT 0x336C60 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM2_CH1_CTR_CNT 0x336C64 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM3_CH0_CTR_CNT 0x336C68 #define mmSIF_RTR_CTRL_3_E2E_AR_HBM3_CH1_CTR_CNT 0x336C6C #define mmSIF_RTR_CTRL_3_E2E_AW_HBM0_CH0_CTR_WRAP 0x336C70 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM0_CH1_CTR_WRAP 0x336C74 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM1_CH0_CTR_WRAP 0x336C78 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM1_CH1_CTR_WRAP 0x336C7C #define mmSIF_RTR_CTRL_3_E2E_AW_HBM2_CH0_CTR_WRAP 0x336C80 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM2_CH1_CTR_WRAP 0x336C84 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM3_CH0_CTR_WRAP 0x336C88 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM3_CH1_CTR_WRAP 0x336C8C #define mmSIF_RTR_CTRL_3_E2E_AW_HBM0_CH0_CTR_CNT 0x336C90 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM0_CH1_CTR_CNT 0x336C94 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM1_CH0_CTR_CNT 0x336C98 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM1_CH1_CTR_CNT 0x336C9C #define mmSIF_RTR_CTRL_3_E2E_AW_HBM2_CH0_CTR_CNT 0x336CA0 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM2_CH1_CTR_CNT 0x336CA4 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM3_CH0_CTR_CNT 0x336CA8 #define mmSIF_RTR_CTRL_3_E2E_AW_HBM3_CH1_CTR_CNT 0x336CAC #define mmSIF_RTR_CTRL_3_NL_HBM_PC_SEL_0 0x336CB0 #define mmSIF_RTR_CTRL_3_NL_HBM_PC_SEL_1 0x336CB4 #define mmSIF_RTR_CTRL_3_NL_HBM_PC_SEL_2 0x336CB8 #define mmSIF_RTR_CTRL_3_NL_HBM_PC_SEL_3 0x336CBC #endif /* ASIC_REG_SIF_RTR_CTRL_3_REGS_H_ */