// Copyright 2016 The Fuchsia Authors // Copyright (c) 2008 Travis Geiselbrecht // // Use of this source code is governed by a MIT-style // license that can be found in the LICENSE file or at // https://opensource.org/licenses/MIT #pragma once #include /* low level macros for accessing memory mapped hardware registers */ #define REG64(addr) ((volatile uint64_t *)(uintptr_t)(addr)) #define REG32(addr) ((volatile uint32_t *)(uintptr_t)(addr)) #define REG16(addr) ((volatile uint16_t *)(uintptr_t)(addr)) #define REG8(addr) ((volatile uint8_t *)(uintptr_t)(addr)) #define RMWREG64(addr, startbit, width, val) *REG64(addr) = (*REG64(addr) & ~(((1<<(width)) - 1) << (startbit))) | ((val) << (startbit)) #define RMWREG32(addr, startbit, width, val) *REG32(addr) = (*REG32(addr) & ~(((1<<(width)) - 1) << (startbit))) | ((val) << (startbit)) #define RMWREG16(addr, startbit, width, val) *REG16(addr) = (*REG16(addr) & ~(((1<<(width)) - 1) << (startbit))) | ((val) << (startbit)) #define RMWREG8(addr, startbit, width, val) *REG8(addr) = (*REG8(addr) & ~(((1<<(width)) - 1) << (startbit))) | ((val) << (startbit)) #define writell(v, a) (*REG64(a) = (v)) #define readll(a) (*REG64(a)) #define writel(v, a) (*REG32(a) = (v)) #define readl(a) (*REG32(a)) #define writew(v, a) (*REG16(a) = (v)) #define readw(a) (*REG16(a)) #define writeb(v, a) (*REG8(a) = (v)) #define readb(a) (*REG8(a))