Lines Matching refs:CLK_INFRA_NR_CLK
50 #define CLK_INFRA_NR_CLK 37
154 #define CK_INFRA_UART0_SEL (0 + CLK_INFRA_NR_CLK)
155 #define CK_INFRA_UART1_SEL (1 + CLK_INFRA_NR_CLK)
156 #define CK_INFRA_UART2_SEL (2 + CLK_INFRA_NR_CLK)
157 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK)
158 #define CK_INFRA_SPI1_SEL (4 + CLK_INFRA_NR_CLK)
159 #define CK_INFRA_PWM1_SEL (5 + CLK_INFRA_NR_CLK)
160 #define CK_INFRA_PWM2_SEL (6 + CLK_INFRA_NR_CLK)
161 #define CK_INFRA_PWM_BSEL (7 + CLK_INFRA_NR_CLK)
162 #define CK_INFRA_PCIE_SEL (8 + CLK_INFRA_NR_CLK)