drivers/ufs/ufs.c

79 	while ((ufshcd_readl(hba, reg) & mask) != val) {
81 			if ((ufshcd_readl(hba, reg) & mask) != val)
135 	if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
146 	return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
155 	return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
164 	return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
197 		intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
390 	u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
439 	reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
536 	return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
684 	return ufshcd_readl(hba, REG_UFS_VERSION);
692 	return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
850 		intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
1946 	hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
1979 	ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),