Lines Matching refs:status
64 u32 status; /* SPI_STATUS_0 register */
147 /* Clear stale status here */
150 writel(reg, ®s->status);
151 debug("%s: STATUS = %08x\n", __func__, readl(®s->status));
228 reg = readl(®s->status);
229 writel(reg, ®s->status); /* Clear all SPI events via R/W */
265 * The RX FIFO status will be read and cleared last
268 u32 status;
270 status = readl(®s->status);
273 if (is_read && (status & SPI_STAT_TXF_EMPTY))
276 if ((status & (SPI_STAT_BSY | SPI_STAT_RDY)) !=
280 else if (!(status & SPI_STAT_RXF_EMPTY)) {
299 writel(readl(®s->status), ®s->status);
305 debug("spi_xfer: transfer ended. Value=%08x, status = %08x\n",
306 tmpdin, readl(®s->status));