drivers/spi/meson_spifc_a1.c

106 	void __iomem *base;
117 	       spifc->base + SPIFC_A1_USER_CTRL0_REG);
119 	return readl_poll_timeout(spifc->base + SPIFC_A1_USER_CTRL0_REG,
132 	       spifc->base + SPIFC_A1_DBUF_CTRL_REG);
133 	ioread32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
136 		data = readl(spifc->base + SPIFC_A1_DBUF_DATA_REG);
149 	       spifc->base + SPIFC_A1_DBUF_CTRL_REG);
150 	iowrite32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
154 		writel(data, spifc->base + SPIFC_A1_DBUF_DATA_REG);
160 	writel(0, spifc->base + SPIFC_A1_USER_CTRL0_REG);
161 	writel(0, spifc->base + SPIFC_A1_USER_CTRL1_REG);
162 	writel(0, spifc->base + SPIFC_A1_USER_CTRL2_REG);
163 	writel(0, spifc->base + SPIFC_A1_USER_CTRL3_REG);
171 	val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG);
174 	writel(val, spifc->base + SPIFC_A1_USER_CTRL1_REG);
182 	writel(addr, spifc->base + SPIFC_A1_USER_ADDR_REG);
184 	val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG);
187 	writel(val, spifc->base + SPIFC_A1_USER_CTRL1_REG);
193 	u32 val = readl(spifc->base + SPIFC_A1_USER_CTRL2_REG);
197 	writel(val, spifc->base + SPIFC_A1_USER_CTRL2_REG);
203 	u32 val = readl(spifc->base + SPIFC_A1_USER_CTRL3_REG);
210 	writel(val, spifc->base + SPIFC_A1_USER_CTRL3_REG);
226 	val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG);
231 	writel(val, spifc->base + SPIFC_A1_USER_CTRL1_REG);
275 		writel(0, spifc->base + SPIFC_A1_USER_DBUF_ADDR_REG);
301 	regv = readl(spifc->base + SPIFC_A1_AHB_REQ_CTRL_REG);
303 	writel(regv, spifc->base + SPIFC_A1_AHB_REQ_CTRL_REG);
305 	regv = readl(spifc->base + SPIFC_A1_AHB_CTRL_REG);
307 	writel(regv, spifc->base + SPIFC_A1_AHB_CTRL_REG);
309 	writel(SPIFC_A1_ACTIMING0_VAL, spifc->base + SPIFC_A1_ACTIMING0_REG);
311 	writel(0, spifc->base + SPIFC_A1_USER_DBUF_ADDR_REG);
325 	spifc->base = dev_read_addr_ptr(dev);
326 	if (!spifc->base)