ram/octeon/octeon_ddr.c

248 static void set_ddr_clock_initialized(struct ddr_priv *priv, int if_num,
251 	priv->ddr_clock_initialized[if_num] = inited_flag;
254 static int ddr_clock_initialized(struct ddr_priv *priv, int if_num)
256 	return priv->ddr_clock_initialized[if_num];
269 static void cn78xx_lmc_dreset_init(struct ddr_priv *priv, int if_num)
285 	dll_ctl2.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL2(if_num));
287 	lmc_wr(priv, CVMX_LMCX_DLL_CTL2(if_num), dll_ctl2.u64);
293 	lmc_rd(priv, CVMX_LMCX_DLL_CTL2(if_num));
308 	dll_ctl2.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL2(if_num));
310 	lmc_wr(priv, CVMX_LMCX_DLL_CTL2(if_num), dll_ctl2.u64);
316 	lmc_rd(priv, CVMX_LMCX_DLL_CTL2(if_num));
331 	dll_ctl2.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL2(if_num));
333 	lmc_wr(priv, CVMX_LMCX_DLL_CTL2(if_num), dll_ctl2.u64);
339 	lmc_rd(priv, CVMX_LMCX_DLL_CTL2(if_num));
353 	dll_ctl2.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL2(if_num));
355 	lmc_wr(priv, CVMX_LMCX_DLL_CTL2(if_num), dll_ctl2.u64);
360 			 int if_num, u32 if_mask)
364 	if (ddr_clock_initialized(priv, if_num))
507 		if (if_num != 0)
1445 		lmc_wr(priv, CVMX_LMCX_MEM_CFG0(if_num), mem_cfg0.u64);
1446 		lmc_rd(priv, CVMX_LMCX_MEM_CFG0(if_num));
1449 	set_ddr_clock_initialized(priv, if_num, 1);
1473 				    int if_num, u32 if_mask)
1481 					 ddr_hertz, ddr_ref_hertz, if_num,
1489 		ddr_clocks = lmc_rd(priv, CVMX_LMCX_DCLK_CNT(if_num));
1494 		    lmc_rd(priv, CVMX_LMCX_DCLK_CNT(if_num)) - ddr_clocks;
1498 		ddr_clocks = lmc_rd(priv, CVMX_LMCX_DCLK_CNT(if_num));
1503 		    lmc_rd(priv, CVMX_LMCX_DCLK_CNT(if_num)) - ddr_clocks;
1511 		ddr_clocks = lmc_rd(priv, CVMX_LMCX_DCLK_CNT_LO(if_num));
1516 		    lmc_rd(priv, CVMX_LMCX_DCLK_CNT_LO(if_num)) - ddr_clocks;
1523 	      if_num, calc_ddr_hertz, cpu_hertz, ddr_clocks);
1529 		       if_num);
1536 u64 lmc_ddr3_rl_dbg_read(struct ddr_priv *priv, int if_num, int idx)
1541 	rlevel_ctl.u64 = lmc_rd(priv, CVMX_LMCX_RLEVEL_CTL(if_num));
1544 	lmc_wr(priv, CVMX_LMCX_RLEVEL_CTL(if_num), rlevel_ctl.u64);
1545 	lmc_rd(priv, CVMX_LMCX_RLEVEL_CTL(if_num));
1547 	rlevel_dbg.u64 = lmc_rd(priv, CVMX_LMCX_RLEVEL_DBG(if_num));
1551 u64 lmc_ddr3_wl_dbg_read(struct ddr_priv *priv, int if_num, int idx)
1558 	lmc_wr(priv, CVMX_LMCX_WLEVEL_DBG(if_num), wlevel_dbg.u64);
1559 	lmc_rd(priv, CVMX_LMCX_WLEVEL_DBG(if_num));
1561 	wlevel_dbg.u64 = lmc_rd(priv, CVMX_LMCX_WLEVEL_DBG(if_num));
1722 				      u32 ddr_ref_hertz, int if_num,
1746 							      if_num, if_mask);
1751 				       if_num, lmc_restart_retries);
1756 					       if_num, lmc_restart_retries);
1768 	      if_num, mem_size_mbytes);
1951 static void oct2_ddr3_seq(struct ddr_priv *priv, int rank_mask, int if_num,
1973 	lmc_control.u64 = lmc_rd(priv, CVMX_LMCX_CONTROL(if_num));
1992 	lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), lmc_control.u64);
1994 	lmc_config.u64 = lmc_rd(priv, CVMX_LMCX_CONFIG(if_num));
2006 	lmc_wr(priv, CVMX_LMCX_CONFIG(if_num), lmc_config.u64);
2007 	lmc_rd(priv, CVMX_LMCX_CONFIG(if_num));
2011 	lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), lmc_control.u64);
2012 	lmc_rd(priv, CVMX_LMCX_CONTROL(if_num));
2031 void change_dll_offset_enable(struct ddr_priv *priv, int if_num, int change)
2035 	ddr_dll_ctl3.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL3(if_num));
2037 	lmc_wr(priv, CVMX_LMCX_DLL_CTL3(if_num), ddr_dll_ctl3.u64);
2038 	ddr_dll_ctl3.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL3(if_num));
2041 unsigned short load_dll_offset(struct ddr_priv *priv, int if_num,
2056 	ddr_dll_ctl3.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL3(if_num));
2058 	lmc_wr(priv, CVMX_LMCX_DLL_CTL3(if_num), ddr_dll_ctl3.u64);
2059 	ddr_dll_ctl3.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL3(if_num));
2066 	lmc_wr(priv, CVMX_LMCX_DLL_CTL3(if_num), ddr_dll_ctl3.u64);
2067 	ddr_dll_ctl3.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL3(if_num));
2070 	lmc_wr(priv, CVMX_LMCX_DLL_CTL3(if_num), ddr_dll_ctl3.u64);
2071 	ddr_dll_ctl3.u64 = lmc_rd(priv, CVMX_LMCX_DLL_CTL3(if_num));
2076 void process_custom_dll_offsets(struct ddr_priv *priv, int if_num,
2110 	change_dll_offset_enable(priv, if_num, 0);
2118 			s = lookup_env(priv, byte_str, if_num, byte);
2124 		    load_dll_offset(priv, if_num, mode, byte_offset, byte);
2127 	change_dll_offset_enable(priv, if_num, 1);
2130 	      if_num, (mode == 2) ? "Read " : "Write",
2135 void ddr_init_seq(struct ddr_priv *priv, int rank_mask, int if_num)
2141 	s = lookup_env(priv, "ddr%d_init_loops", if_num);
2152 				oct3_ddr3_seq(priv, 1 << rankx, if_num, 0);
2155 				oct2_ddr3_seq(priv, 1 << rankx, if_num, 0);
2168 						      if_num, sequence1);
2171 						      if_num, sequence1);
2183 						      if_num, sequence2);
2186 						      if_num, sequence2);