Lines Matching refs:lanes
290 // Byte lanes may be clear in the mask to indicate no testing on that
427 // active byte lanes
1587 // First, make sure all byte-lanes are out of VREF bypass mode
1590 ddr_dll_ctl3.cn78xx.byte_sel = 0x0A; /* all byte-lanes */
2722 static struct bytelane_sample lanes[9] __section(".data");
4251 memset(lanes, 0, sizeof(lanes));
4253 // init all lanes to reset value
4327 lanes[lane].bytes[sample] =
4348 process_samples_average(&lanes[lane].bytes[0],
4591 // do all the byte-lanes at the same time
4869 * LMC(0)_WLEVEL_CTL[LANEMASK] to select all byte lanes with attached
4875 * LMC(0)_WLEVEL_CTL[LANEMASK] to select all even byte lanes with
4917 * lanes selected by LMC(0)_WLEVEL_CTL[LANEMASK] at this point.
4924 * LMC(0)_WLEVEL_CTL[LANEMASK] to select all odd byte lanes with
4935 * lanes on all ranks with attached DRAM.
4937 * At this point, all byte lanes on rank i with attached DRAM should
4952 * o Known values for some byte lanes.
4954 * o Relative values for some byte lanes relative to others.
5380 // remember, errors will not be returned for byte-lanes that have
7788 * Software can observe all pass/fail results for all byte lanes in a
7825 * lanes at this point.