Lines Matching defs:ddrss
17 #include "k3-am654-ddrss.h"
29 * struct am654_ddrss_desc - Description of ddrss integration.
63 #define ddrss_ctl_writel(off, val) ddrss_writel(ddrss->ddrss_ctl_cfg, off, val)
64 #define ddrss_ctl_readl(off) ddrss_readl(ddrss->ddrss_ctl_cfg, off)
66 static inline u32 am654_ddrss_get_type(struct am654_ddrss_desc *ddrss)
80 static int am654_ddrss_dram_wait_for_init_complt(struct am654_ddrss_desc *ddrss)
84 val = am654_ddrss_get_type(ddrss);
100 ddrss->ddrss_ctl_cfg + DDRSS_DDRCTL_STAT, LDELAY))
108 * @dev: corresponding ddrss device
110 static void am654_ddrss_ctrl_configuration(struct am654_ddrss_desc *ddrss)
112 struct ddrss_ddrctl_timing_params *tmg = &ddrss->params.ctl_timing;
113 struct ddrss_ddrctl_reg_params *reg = &ddrss->params.ctl_reg;
114 struct ddrss_ddrctl_ecc_params *ecc = &ddrss->params.ctl_ecc;
115 struct ddrss_ddrctl_crc_params *crc = &ddrss->params.ctl_crc;
116 struct ddrss_ddrctl_map_params *map = &ddrss->params.ctl_map;
187 ddrss_writel(ddrss->ddrss_phy_cfg, off, val); \
193 u32 val = ddrss_readl(ddrss->ddrss_phy_cfg, off); \
200 * @ddrss: corresponding ddrss device
202 static void am654_ddrss_phy_configuration(struct am654_ddrss_desc *ddrss)
204 struct ddrss_ddrphy_ioctl_params *ioctl = &ddrss->params.phy_ioctl;
205 struct ddrss_ddrphy_timing_params *tmg = &ddrss->params.phy_timing;
206 struct ddrss_ddrphy_ctrl_params *ctrl = &ddrss->params.phy_ctrl;
207 struct ddrss_ddrphy_cfg_params *cfg = &ddrss->params.phy_cfg;
208 struct ddrss_ddrphy_zq_params *zq = &ddrss->params.phy_zq;
319 static int __phy_builtin_init_routine(struct am654_ddrss_desc *ddrss,
330 ddrss->ddrss_phy_cfg + DDRSS_DDRPHY_PGSR0, LDELAY))
343 int write_leveling(struct am654_ddrss_desc *ddrss)
349 ret = __phy_builtin_init_routine(ddrss, PIR_WL_MASK, PGSR0_WLDONE_MASK,
364 int read_dqs_training(struct am654_ddrss_desc *ddrss)
370 ret = __phy_builtin_init_routine(ddrss, PIR_QSGATE_MASK,
385 int dqs2dq_training(struct am654_ddrss_desc *ddrss)
391 ret = __phy_builtin_init_routine(ddrss, PIR_DQS2DQ_MASK,
408 int write_leveling_adjustment(struct am654_ddrss_desc *ddrss)
413 ret = __phy_builtin_init_routine(ddrss, PIR_WLADJ_MASK,
427 int rest_training(struct am654_ddrss_desc *ddrss)
434 ret = __phy_builtin_init_routine(ddrss, PIR_RDDSKW_MASK,
445 ret = __phy_builtin_init_routine(ddrss, PIR_WRDSKW_MASK,
456 ret = __phy_builtin_init_routine(ddrss, PIR_RDEYE_MASK,
469 ret = __phy_builtin_init_routine(ddrss, PIR_WREYE_MASK,
483 int VREF_training(struct am654_ddrss_desc *ddrss)
487 ret = __phy_builtin_init_routine(ddrss, PIR_VREF_MASK, PGSR0_VDONE_MASK,
499 int enable_dqs_pd(struct am654_ddrss_desc *ddrss)
522 int disable_dqs_pd(struct am654_ddrss_desc *ddrss)
542 int cleanup_training(struct am654_ddrss_desc *ddrss)
631 * device attached to ddrss.
632 * @dev: corresponding ddrss device
638 static int am654_ddrss_init(struct am654_ddrss_desc *ddrss)
642 struct ddrss_ss_reg_params *reg = &ddrss->params.ss_reg;
646 debug("%s(ddrss=%p)\n", __func__, ddrss);
648 ddrss_writel(ddrss->ddrss_ss_cfg, DDRSS_V2H_CTL_REG,
651 am654_ddrss_ctrl_configuration(ddrss);
654 clrbits_le32(ddrss->ddrss_ss_cfg + DDRSS_SS_CTL_REG,
657 am654_ddrss_phy_configuration(ddrss);
660 ret = __phy_builtin_init_routine(ddrss, PIR_PHY_INIT, 0x1, 0);
662 dev_err(ddrss->dev, "PHY initialization failed %d\n", ret);
666 ret = __phy_builtin_init_routine(ddrss, PIR_DRAM_INIT,
669 dev_err(ddrss->dev, "DRAM initialization failed %d\n", ret);
673 ret = am654_ddrss_dram_wait_for_init_complt(ddrss);
680 val = am654_ddrss_get_type(ddrss);
685 ret = __phy_builtin_init_routine(ddrss, PIR_DRAM_INIT,
688 dev_err(ddrss->dev, "DRAM initialization failed %d\n",
694 ret = __phy_builtin_init_routine(ddrss, PIR_DRAM_INIT,
697 dev_err(ddrss->dev, "DRAM initialization failed %d\n",
702 ret = am654_ddrss_dram_wait_for_init_complt(ddrss);
709 ret = write_leveling(ddrss);
713 ret = enable_dqs_pd(ddrss);
717 ret = read_dqs_training(ddrss);
721 ret = disable_dqs_pd(ddrss);
725 ret = dqs2dq_training(ddrss);
729 ret = write_leveling_adjustment(ddrss);
733 ret = rest_training(ddrss);
737 ret = VREF_training(ddrss);
748 ret = __phy_builtin_init_routine(ddrss, PIR_DRAM_INIT,
751 dev_err(ddrss->dev, "DRAM initialization failed %d\n",
756 ret = am654_ddrss_dram_wait_for_init_complt(ddrss);
763 ret = write_leveling(ddrss);
767 ret = read_dqs_training(ddrss);
771 ret = write_leveling_adjustment(ddrss);
775 ret = rest_training(ddrss);
779 ret = VREF_training(ddrss);
789 ret = __phy_builtin_init_routine(ddrss, PIR_DRAM_INIT,
792 dev_err(ddrss->dev, "DRAM initialization failed %d\n",
797 ret = am654_ddrss_dram_wait_for_init_complt(ddrss);
804 ret = write_leveling(ddrss);
808 ret = enable_dqs_pd(ddrss);
812 ret = read_dqs_training(ddrss);
816 ret = disable_dqs_pd(ddrss);
820 ret = write_leveling_adjustment(ddrss);
824 ret = rest_training(ddrss);
835 ret = cleanup_training(ddrss);
853 * am654_ddrss_power_on() - Enable power and clocks for ddrss
854 * @dev: corresponding ddrss device
856 * Tries to enable all the corresponding clocks to the ddrss and sets it
857 * to the right frequency and then power on the ddrss.
860 static int am654_ddrss_power_on(struct am654_ddrss_desc *ddrss)
864 debug("%s(ddrss=%p)\n", __func__, ddrss);
866 ret = clk_enable(&ddrss->ddrss_clk);
868 dev_err(ddrss->dev, "clk_enable() failed: %d\n", ret);
872 ret = power_domain_on(&ddrss->ddrcfg_pwrdmn);
874 dev_err(ddrss->dev, "power_domain_on() failed: %d\n", ret);
878 ret = power_domain_on(&ddrss->ddrdata_pwrdmn);
880 dev_err(ddrss->dev, "power_domain_on() failed: %d\n", ret);
886 device_get_supply_regulator(ddrss->dev, "vtt-supply",
887 &ddrss->vtt_supply);
888 ret = regulator_set_value(ddrss->vtt_supply, 3300000);
898 * @dev: corresponding ddrss device
904 struct am654_ddrss_desc *ddrss = dev_get_priv(dev);
910 ret = clk_get_by_index(dev, 0, &ddrss->ddrss_clk);
916 ret = power_domain_get_by_index(dev, &ddrss->ddrcfg_pwrdmn, 0);
922 ret = power_domain_get_by_index(dev, &ddrss->ddrdata_pwrdmn, 1);
933 ddrss->ddrss_ss_cfg = reg;
940 ddrss->ddrss_ctl_cfg = reg;
947 ddrss->ddrss_phy_cfg = reg;
950 (u32 *)&ddrss->params.ss_reg,
951 sizeof(ddrss->params.ss_reg) / sizeof(u32));
958 (u32 *)&ddrss->params.ctl_reg,
959 sizeof(ddrss->params.ctl_reg) / sizeof(u32));
966 (u32 *)&ddrss->params.ctl_crc,
967 sizeof(ddrss->params.ctl_crc) / sizeof(u32));
974 (u32 *)&ddrss->params.ctl_ecc,
975 sizeof(ddrss->params.ctl_ecc) / sizeof(u32));
982 (u32 *)&ddrss->params.ctl_map,
983 sizeof(ddrss->params.ctl_map) / sizeof(u32));
990 (u32 *)&ddrss->params.ctl_pwr,
991 sizeof(ddrss->params.ctl_pwr) / sizeof(u32));
998 (u32 *)&ddrss->params.ctl_timing,
999 sizeof(ddrss->params.ctl_timing) /
1007 (u32 *)&ddrss->params.phy_cfg,
1008 sizeof(ddrss->params.phy_cfg) / sizeof(u32));
1015 (u32 *)&ddrss->params.phy_ctrl,
1016 sizeof(ddrss->params.phy_ctrl) / sizeof(u32));
1023 (u32 *)&ddrss->params.phy_ioctl,
1024 sizeof(ddrss->params.phy_ioctl) / sizeof(u32));
1031 (u32 *)&ddrss->params.phy_timing,
1032 sizeof(ddrss->params.phy_timing) /
1039 ret = dev_read_u32_array(dev, "ti,phy-zq", (u32 *)&ddrss->params.phy_zq,
1040 sizeof(ddrss->params.phy_zq) / sizeof(u32));
1051 * @dev: corresponding ddrss device
1057 struct am654_ddrss_desc *ddrss = dev_get_priv(dev);
1066 ddrss->dev = dev;
1067 ret = am654_ddrss_power_on(ddrss);
1071 ret = am654_ddrss_init(ddrss);
1086 { .compatible = "ti,am654-ddrss" },