Lines Matching defs:NA

14 #define NA 0xff
34 if (plat->volt_reg == NA)
61 if (plat->volt_reg == NA)
130 { "dcdc2", 0x12, BIT(6), 0x23, 0x3f, 700, 2275, 25, NA },
131 { "dcdc3", 0x12, BIT(5), 0x27, 0x3f, 700, 3500, 50, NA },
132 { "dcdc4", 0x12, BIT(4), 0x2b, 0x7f, 700, 3500, 25, NA },
135 { "dldo1", 0x12, BIT(1), 0x29, 0x1f, 700, 3500, 100, NA },
136 { "dldo2", 0x12, BIT(0), 0x2a, 0x1f, 700, 3500, 100, NA },
147 { "dcdc2", 0x12, BIT(4), 0x23, 0x3f, 700, 2275, 25, NA },
148 { "dcdc3", 0x12, BIT(1), 0x27, 0x7f, 700, 3500, 25, NA },
149 { "ldo2", 0x12, BIT(2), 0x28, 0xf0, 1800, 3300, 100, NA },
150 { "ldo3", 0x12, BIT(6), 0x29, 0x7f, 700, 2275, 25, NA },
156 {"dc5ldo", 0x10, BIT(0), 0x1c, 0x07, 700, 1400, 100, NA },
157 { "dcdc1", 0x10, BIT(1), 0x21, 0x1f, 1600, 3400, 100, NA },
158 { "dcdc2", 0x10, BIT(2), 0x22, 0x3f, 600, 1540, 20, NA },
159 { "dcdc3", 0x10, BIT(3), 0x23, 0x3f, 600, 1860, 20, NA },
160 { "dcdc4", 0x10, BIT(4), 0x24, 0x3f, 600, 1540, 20, NA },
161 { "dcdc5", 0x10, BIT(5), 0x25, 0x1f, 1000, 2550, 50, NA },
162 { "aldo1", 0x10, BIT(6), 0x28, 0x1f, 700, 3300, 100, NA },
163 { "aldo2", 0x10, BIT(7), 0x29, 0x1f, 700, 3300, 100, NA },
164 { "aldo3", 0x13, BIT(7), 0x2a, 0x1f, 700, 3300, 100, NA },
165 { "dldo1", 0x12, BIT(3), 0x15, 0x1f, 700, 3300, 100, NA },
166 { "dldo2", 0x12, BIT(4), 0x16, 0x1f, 700, 3300, 100, NA },
167 { "dldo3", 0x12, BIT(5), 0x17, 0x1f, 700, 3300, 100, NA },
168 { "dldo4", 0x12, BIT(6), 0x18, 0x1f, 700, 3300, 100, NA },
169 { "eldo1", 0x12, BIT(0), 0x19, 0x1f, 700, 3300, 100, NA },
170 { "eldo2", 0x12, BIT(1), 0x1a, 0x1f, 700, 3300, 100, NA },
171 { "eldo3", 0x12, BIT(2), 0x1b, 0x1f, 700, 3300, 100, NA },
172 { "dc1sw", 0x12, BIT(7), NA, NA, NA, NA, NA, NA },
187 { "aldo1", 0x10, BIT(3), 0x16, 0x1f, 500, 3500, 100, NA },
188 { "dldo1", 0x10, BIT(4), 0x17, 0x1f, 500, 3500, 100, NA },
201 { "dcdc4", 0x80, BIT(3), 0x86, 0x7f, 1000, 3700, 100, NA },
202 { "aldo1", 0x90, BIT(0), 0x93, 0x1f, 500, 3500, 100, NA },
203 { "aldo2", 0x90, BIT(1), 0x94, 0x1f, 500, 3500, 100, NA },
204 { "aldo3", 0x90, BIT(2), 0x95, 0x1f, 500, 3500, 100, NA },
205 { "aldo4", 0x90, BIT(3), 0x96, 0x1f, 500, 3500, 100, NA },
206 { "bldo1", 0x90, BIT(4), 0x97, 0x1f, 500, 3500, 100, NA },
207 { "bldo2", 0x90, BIT(5), 0x98, 0x1f, 500, 3500, 100, NA },
208 { "bldo3", 0x90, BIT(6), 0x99, 0x1f, 500, 3500, 100, NA },
209 { "bldo4", 0x90, BIT(7), 0x9a, 0x1f, 500, 3500, 100, NA },
210 { "cldo1", 0x91, BIT(0), 0x9b, 0x1f, 500, 3500, 100, NA },
211 { "cldo2", 0x91, BIT(1), 0x9c, 0x1f, 500, 3500, 100, NA },
212 { "cldo3", 0x91, BIT(2), 0x9d, 0x1f, 500, 3500, 100, NA },
213 { "cldo4", 0x91, BIT(3), 0x9e, 0x1f, 500, 3500, 100, NA },
214 {"cpusldo",0x91, BIT(4), 0x9f, 0x1f, 500, 1400, 50, NA },
215 {" boost", 0x19, BIT(4), 0x1e, 0xf0, 4550, 5510, 64, NA },
220 { "dcdc1", 0x10, BIT(0), 0x20, 0x1f, 1600, 3400, 100, NA },
226 { "aldo1", 0x13, BIT(5), 0x28, 0x1f, 700, 3300, 100, NA },
227 { "aldo2", 0x13, BIT(6), 0x29, 0x1f, 700, 3300, 100, NA },
228 { "aldo3", 0x13, BIT(7), 0x2a, 0x1f, 700, 3300, 100, NA },
229 { "dldo1", 0x12, BIT(3), 0x15, 0x1f, 700, 3300, 100, NA },
231 { "dldo3", 0x12, BIT(5), 0x17, 0x1f, 700, 3300, 100, NA },
232 { "dldo4", 0x12, BIT(6), 0x18, 0x1f, 700, 3300, 100, NA },
233 { "eldo1", 0x12, BIT(0), 0x19, 0x1f, 700, 1900, 50, NA },
234 { "eldo2", 0x12, BIT(1), 0x1a, 0x1f, 700, 1900, 50, NA },
235 { "eldo3", 0x12, BIT(2), 0x1b, 0x1f, 700, 1900, 50, NA },
236 { "fldo1", 0x13, BIT(2), 0x1c, 0x0f, 700, 1450, 50, NA },
237 { "fldo2", 0x13, BIT(3), 0x1d, 0x0f, 700, 1450, 50, NA },
238 { "dc1sw", 0x12, BIT(7), NA, NA, NA, NA, NA, NA },
248 { "dcdcb", 0x10, BIT(1), 0x13, 0x1f, 1000, 2550, 50, NA },
250 { "dcdcd", 0x10, BIT(3), 0x15, 0x3f, 600, 1500, 20, NA },
251 { "dcdce", 0x10, BIT(4), 0x16, 0x1f, 1100, 3400, 100, NA },
252 { "aldo1", 0x10, BIT(5), 0x17, 0x1f, 700, 3300, 100, NA },
253 { "aldo2", 0x10, BIT(6), 0x18, 0x1f, 700, 3300, 100, NA },
254 { "aldo3", 0x10, BIT(7), 0x19, 0x1f, 700, 3300, 100, NA },
255 { "bldo1", 0x11, BIT(0), 0x20, 0x0f, 700, 1900, 100, NA },
256 { "bldo2", 0x11, BIT(1), 0x21, 0x0f, 700, 1900, 100, NA },
257 { "bldo3", 0x11, BIT(2), 0x22, 0x0f, 700, 1900, 100, NA },
258 { "bldo4", 0x11, BIT(3), 0x23, 0x0f, 700, 1900, 100, NA },
259 { "cldo1", 0x11, BIT(4), 0x24, 0x1f, 700, 3300, 100, NA },
261 { "cldo3", 0x11, BIT(6), 0x26, 0x1f, 700, 3300, 100, NA },
262 { "sw", 0x11, BIT(7), NA, NA, NA, NA, NA, NA },
271 {"dc5ldo", 0x10, BIT(0), 0x1c, 0x07, 700, 1400, 100, NA },
272 { "dcdc1", 0x10, BIT(1), 0x21, 0x1f, 1600, 3400, 100, NA },
273 { "dcdc2", 0x10, BIT(2), 0x22, 0x3f, 600, 1540, 20, NA },
274 { "dcdc3", 0x10, BIT(3), 0x23, 0x3f, 600, 1860, 20, NA },
275 { "dcdc4", 0x10, BIT(4), 0x24, 0x3f, 600, 1540, 20, NA },
276 { "dcdc5", 0x10, BIT(5), 0x25, 0x1f, 1000, 2550, 50, NA },
277 { "aldo1", 0x10, BIT(6), 0x28, 0x1f, 700, 3300, 100, NA },
278 { "aldo2", 0x10, BIT(7), 0x29, 0x1f, 700, 3300, 100, NA },
279 { "aldo3", 0x12, BIT(5), 0x2a, 0x1f, 700, 3300, 100, NA },
280 { "dldo1", 0x12, BIT(3), 0x15, 0x1f, 700, 3300, 100, NA },
281 { "dldo2", 0x12, BIT(4), 0x16, 0x1f, 700, 3300, 100, NA },
282 { "eldo1", 0x12, BIT(0), 0x19, 0x1f, 700, 3300, 100, NA },
283 { "eldo2", 0x12, BIT(1), 0x1a, 0x1f, 700, 3300, 100, NA },
284 { "eldo3", 0x12, BIT(2), 0x1b, 0x1f, 700, 3300, 100, NA },
285 { "sw", 0x12, BIT(6), NA, NA, NA, NA, NA, NA },
286 { "dc1sw", 0x12, BIT(7), NA, NA, NA, NA, NA, NA },
291 { "dcdc1", 0x10, BIT(0), 0x20, 0x1f, 1600, 3400, 100, NA },
298 { "aldo1", 0x13, BIT(5), 0x28, 0x1f, 700, 3300, 100, NA },
299 { "aldo2", 0x13, BIT(6), 0x29, 0x1f, 700, 3300, 100, NA },
300 { "aldo3", 0x13, BIT(7), 0x2a, 0x1f, 700, 3300, 100, NA },
301 { "dldo1", 0x12, BIT(3), 0x15, 0x1f, 700, 3300, 100, NA },
303 { "dldo3", 0x12, BIT(5), 0x17, 0x1f, 700, 3300, 100, NA },
304 { "dldo4", 0x12, BIT(6), 0x18, 0x1f, 700, 3300, 100, NA },
305 { "eldo1", 0x12, BIT(0), 0x19, 0x1f, 700, 1900, 50, NA },
306 { "eldo2", 0x12, BIT(1), 0x1a, 0x1f, 700, 1900, 50, NA },
307 { "eldo3", 0x12, BIT(2), 0x1b, 0x1f, 700, 1900, 50, NA },
308 { "fldo1", 0x13, BIT(2), 0x1c, 0x0f, 700, 1450, 50, NA },
309 { "fldo2", 0x13, BIT(3), 0x1d, 0x0f, 700, 1450, 50, NA },
310 { "fldo3", 0x13, BIT(4), NA, NA, NA, NA, NA, NA },
342 if (plat->volt_reg == NA)