drivers/pinctrl/pinctrl-at91.c

100 	void (*mux_A_periph)(struct at91_port *pio, u32 mask);
101 	void (*mux_B_periph)(struct at91_port *pio, u32 mask);
102 	void (*mux_C_periph)(struct at91_port *pio, u32 mask);
103 	void (*mux_D_periph)(struct at91_port *pio, u32 mask);
104 	void (*set_deglitch)(struct at91_port *pio, u32 mask, bool is_on);
105 	void (*set_debounce)(struct at91_port *pio, u32 mask, bool is_on,
107 	void (*set_pulldown)(struct at91_port *pio, u32 mask, bool is_on);
108 	void (*disable_schmitt_trig)(struct at91_port *pio, u32 mask);
109 	void (*set_drivestrength)(struct at91_port *pio, u32 pin,
111 	void (*set_slewrate)(struct at91_port *pio, u32 pin, u32 slewrate);
122 static void at91_mux_disable_interrupt(struct at91_port *pio, u32 mask)
124 	writel(mask, &pio->idr);
127 static void at91_mux_set_pullup(struct at91_port *pio, u32 mask, bool on)
130 		writel(mask, &pio->mux.pio3.ppddr);
132 	writel(mask, (on ? &pio->puer : &pio->pudr));
135 static void at91_mux_set_output(struct at91_port *pio, unsigned mask,
138 	writel(mask, (val ? &pio->sodr : &pio->codr));
139 	writel(mask, (is_on ? &pio->oer : &pio->odr));
142 static void at91_mux_set_multidrive(struct at91_port *pio, u32 mask, bool on)
144 	writel(mask, (on ? &pio->mder : &pio->mddr));
147 static void at91_mux_set_A_periph(struct at91_port *pio, u32 mask)
149 	writel(mask, &pio->mux.pio2.asr);
152 static void at91_mux_set_B_periph(struct at91_port *pio, u32 mask)
154 	writel(mask, &pio->mux.pio2.bsr);
157 static void at91_mux_pio3_set_A_periph(struct at91_port *pio, u32 mask)
159 	writel(readl(&pio->mux.pio3.abcdsr1) & ~mask, &pio->mux.pio3.abcdsr1);
160 	writel(readl(&pio->mux.pio3.abcdsr2) & ~mask, &pio->mux.pio3.abcdsr2);
163 static void at91_mux_pio3_set_B_periph(struct at91_port *pio, u32 mask)
165 	writel(readl(&pio->mux.pio3.abcdsr1) | mask, &pio->mux.pio3.abcdsr1);
166 	writel(readl(&pio->mux.pio3.abcdsr2) & ~mask, &pio->mux.pio3.abcdsr2);
169 static void at91_mux_pio3_set_C_periph(struct at91_port *pio, u32 mask)
171 	writel(readl(&pio->mux.pio3.abcdsr1) & ~mask, &pio->mux.pio3.abcdsr1);
172 	writel(readl(&pio->mux.pio3.abcdsr2) | mask, &pio->mux.pio3.abcdsr2);
175 static void at91_mux_pio3_set_D_periph(struct at91_port *pio, u32 mask)
177 	writel(readl(&pio->mux.pio3.abcdsr1) | mask, &pio->mux.pio3.abcdsr1);
178 	writel(readl(&pio->mux.pio3.abcdsr2) | mask, &pio->mux.pio3.abcdsr2);
181 static void at91_mux_set_deglitch(struct at91_port *pio, u32 mask, bool is_on)
183 	writel(mask, (is_on ? &pio->ifer : &pio->ifdr));
186 static void at91_mux_pio3_set_deglitch(struct at91_port *pio,
190 		writel(mask, &pio->mux.pio3.ifscdr);
191 	at91_mux_set_deglitch(pio, mask, is_on);
194 static void at91_mux_pio3_set_debounce(struct at91_port *pio, u32 mask,
198 		writel(mask, &pio->mux.pio3.ifscer);
199 		writel(div & PIO_SCDR_DIV, &pio->mux.pio3.scdr);
200 		writel(mask, &pio->ifer);
202 		writel(mask, &pio->mux.pio3.ifscdr);
206 static void at91_mux_pio3_set_pulldown(struct at91_port *pio,
210 		writel(mask, &pio->pudr);
212 	writel(mask, (is_on ? &pio->mux.pio3.ppder : &pio->mux.pio3.ppddr));
215 static void at91_mux_pio3_disable_schmitt_trig(struct at91_port *pio,
218 	writel(readl(&pio->schmitt) | mask, &pio->schmitt);
228 static void at91_mux_sama5d3_set_drivestrength(struct at91_port *pio,
233 	reg = &pio->driver12;
235 		reg = &pio->driver2;
245 static void at91_mux_sam9x5_set_drivestrength(struct at91_port *pio,
250 	reg = &pio->driver1;
252 		reg = &pio->driver12;
265 static void at91_mux_sam9x60_set_drivestrength(struct at91_port *pio, u32 pin,
268 	void *reg = &pio->driver12;
287 static void at91_mux_sam9x60_set_slewrate(struct at91_port *pio, u32 pin,
290 	void *reg = &pio->reserved12[3];
349 static void at91_mux_gpio_disable(struct at91_port *pio, u32 mask)
351 	writel(mask, &pio->pdr);
354 static void at91_mux_gpio_enable(struct at91_port *pio, u32 mask, bool input)
356 	writel(mask, &pio->per);
357 	writel(mask, (input ? &pio->odr : &pio->oer));
361 			struct at91_port *pio, u32 mask, enum at91_mux mux)
363 	at91_mux_disable_interrupt(pio, mask);
366 		at91_mux_gpio_enable(pio, mask, 1);
369 		ops->mux_A_periph(pio, mask);
372 		ops->mux_B_periph(pio, mask);
377 		ops->mux_C_periph(pio, mask);
382 		ops->mux_D_periph(pio, mask);
386 		at91_mux_gpio_disable(pio, mask);
392 			    struct at91_port *pio, u32 pin, u32 config)
399 	at91_mux_set_output(pio, mask, config & OUTPUT,
401 	at91_mux_set_pullup(pio, mask, config & PULL_UP);
402 	at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
404 		ops->set_deglitch(pio, mask, config & DEGLITCH);
406 		ops->set_debounce(pio, mask, config & DEBOUNCE,
409 		ops->set_pulldown(pio, mask, config & PULL_DOWN);
411 		ops->disable_schmitt_trig(pio, mask);
413 		ops->set_drivestrength(pio, pin,
416 		ops->set_slewrate(pio, pin,
451 	struct at91_port *pio;
477 		pio = priv->reg_base[bank];
480 		ret = at91_pmx_set(ops, pio, mask, mux);
484 		ret = at91_pinconf_set(ops, pio, pin, conf);