phy/allwinner/phy-sun4i-usb.c

8  * Modelled arch/arm/mach-sunxi/usb_phy.c to compatible with generic-phy.
130 	struct sun4i_usb_phy_plat *usb_phy;
139 	struct sun4i_usb_phy_plat *usb_phy = &phy_data->usb_phy[phy->id];
140 	u32 temp, usbc_bit = BIT(usb_phy->id * 2);
184 	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
187 	if (!usb_phy->pmu)
194 	if (data->cfg->hsic_index && usb_phy->id == data->cfg->hsic_index)
198 	reg_value = readl(usb_phy->pmu);
205 	writel(reg_value, usb_phy->pmu);
211 	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
224 	if (dm_gpio_is_valid(&usb_phy->gpio_vbus))
225 		dm_gpio_set_value(&usb_phy->gpio_vbus, 1);
233 	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
235 	if (dm_gpio_is_valid(&usb_phy->gpio_vbus))
236 		dm_gpio_set_value(&usb_phy->gpio_vbus, 0);
259 	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
263 	ret = clk_enable(&usb_phy->clocks);
270 	ret = reset_deassert(&usb_phy->resets);
279 		struct sun4i_usb_phy_plat *phy2 = &data->usb_phy[2];
312 	if (usb_phy->pmu && data->cfg->hci_phy_ctl_clear) {
313 		val = readl(usb_phy->pmu + REG_HCI_PHY_CTL);
315 		writel(val, usb_phy->pmu + REG_HCI_PHY_CTL);
326 		if (usb_phy->id == 0)
343 	if (usb_phy->id != 0)
363 	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
377 	ret = clk_disable(&usb_phy->clocks);
384 	ret = reset_assert(&usb_phy->resets);
420 	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
423 	if (dm_gpio_is_valid(&usb_phy->gpio_vbus_det)) {
424 		err = dm_gpio_get_value(&usb_phy->gpio_vbus_det);
432 			err = dm_gpio_get_value(&usb_phy->gpio_vbus_det);
444 	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
446 	if (!dm_gpio_is_valid(&usb_phy->gpio_id_det))
449 	return dm_gpio_get_value(&usb_phy->gpio_id_det);
482 	data->usb_phy = plat;
532 			strlcpy(name, "usb_phy", sizeof(name));