net/ti/cpsw_mdio.c

121 static void cpsw_mdio_disable(struct cpsw_mdio *mdio)
125 	reg = readl(&mdio->regs->control);
128 	writel(reg, &mdio->regs->control);
131 static void cpsw_mdio_enable_manual_mode(struct cpsw_mdio *mdio)
136 	reg = readl(&mdio->regs->poll);
139 	writel(reg, &mdio->regs->poll);
142 static void cpsw_mdio_sw_set_bit(struct cpsw_mdio *mdio,
147 	reg = readl(&mdio->regs->manualif);
152 		writel(reg, &mdio->regs->manualif);
156 		writel(reg, &mdio->regs->manualif);
160 		writel(reg, &mdio->regs->manualif);
167 static void cpsw_mdio_sw_clr_bit(struct cpsw_mdio *mdio,
172 	reg = readl(&mdio->regs->manualif);
177 		writel(reg, &mdio->regs->manualif);
181 		writel(reg, &mdio->regs->manualif);
184 		reg = readl(&mdio->regs->manualif);
186 		writel(reg, &mdio->regs->manualif);
193 static int cpsw_mdio_test_man_bit(struct cpsw_mdio *mdio,
198 	reg = readl(&mdio->regs->manualif);
202 static void cpsw_mdio_toggle_man_bit(struct cpsw_mdio *mdio,
205 	cpsw_mdio_sw_clr_bit(mdio, bit);
206 	cpsw_mdio_sw_set_bit(mdio, bit);
209 static void cpsw_mdio_man_send_pattern(struct cpsw_mdio *mdio,
216 			cpsw_mdio_sw_set_bit(mdio, MDIO_PIN);
218 			cpsw_mdio_sw_clr_bit(mdio, MDIO_PIN);
220 		cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
224 static void cpsw_mdio_sw_preamble(struct cpsw_mdio *mdio)
228 	cpsw_mdio_sw_clr_bit(mdio, MDIO_OE);
230 	cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
231 	cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
232 	cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
233 	cpsw_mdio_sw_set_bit(mdio, MDIO_MDCLK);
236 		cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
237 		cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
238 		cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
239 		cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
252 	struct cpsw_mdio *mdio = MII_TO_CPSW_MDIO(bus);
259 	cpsw_mdio_disable(mdio);
260 	cpsw_mdio_enable_manual_mode(mdio);
261 	cpsw_mdio_sw_preamble(mdio);
263 	cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
264 	cpsw_mdio_sw_set_bit(mdio, MDIO_OE);
267 	cpsw_mdio_man_send_pattern(mdio, C22_BITRANGE, C22_READ_PATTERN);
270 	cpsw_mdio_man_send_pattern(mdio, PHY_BITRANGE, phy_id);
273 	cpsw_mdio_man_send_pattern(mdio, PHY_BITRANGE, phy_reg);
276 	cpsw_mdio_sw_clr_bit(mdio, MDIO_OE);
278 	cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
280 	ack = cpsw_mdio_test_man_bit(mdio, MDIO_PIN);
281 	cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
286 			if (cpsw_mdio_test_man_bit(mdio, MDIO_PIN))
289 			cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
293 			cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
298 	cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
299 	cpsw_mdio_sw_set_bit(mdio, MDIO_MDCLK);
300 	cpsw_mdio_sw_set_bit(mdio, MDIO_MDCLK);
301 	cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
309 	struct cpsw_mdio *mdio = MII_TO_CPSW_MDIO(bus);
314 	cpsw_mdio_disable(mdio);
315 	cpsw_mdio_enable_manual_mode(mdio);
316 	cpsw_mdio_sw_preamble(mdio);
318 	cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
319 	cpsw_mdio_sw_set_bit(mdio, MDIO_OE);
322 	cpsw_mdio_man_send_pattern(mdio, C22_BITRANGE, C22_WRITE_PATTERN);
325 	cpsw_mdio_man_send_pattern(mdio, PHY_BITRANGE, phy_id);
328 	cpsw_mdio_man_send_pattern(mdio, PHY_BITRANGE, phy_reg);
331 	cpsw_mdio_sw_set_bit(mdio, MDIO_PIN);
332 	cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
333 	cpsw_mdio_sw_clr_bit(mdio, MDIO_PIN);
334 	cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
337 	cpsw_mdio_man_send_pattern(mdio, PHY_DATA_BITRANGE, phy_data);
338 	cpsw_mdio_sw_clr_bit(mdio, MDIO_OE);
340 	cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
341 	cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
342 	cpsw_mdio_sw_clr_bit(mdio, MDIO_MDCLK);
343 	cpsw_mdio_toggle_man_bit(mdio, MDIO_MDCLK);
349 static int cpsw_mdio_wait_for_user_access(struct cpsw_mdio *mdio)
351 	return wait_for_bit_le32(&mdio->regs->user[0].access,
359 	struct cpsw_mdio *mdio = MII_TO_CPSW_MDIO(bus);
366 	ret = cpsw_mdio_wait_for_user_access(mdio);
372 	writel(reg, &mdio->regs->user[0].access);
373 	ret = cpsw_mdio_wait_for_user_access(mdio);
377 	reg = readl(&mdio->regs->user[0].access);
385 	struct cpsw_mdio *mdio = MII_TO_CPSW_MDIO(bus);
392 	ret = cpsw_mdio_wait_for_user_access(mdio);
399 	writel(reg, &mdio->regs->user[0].access);
401 	return cpsw_mdio_wait_for_user_access(mdio);
407 	struct cpsw_mdio *mdio = MII_TO_CPSW_MDIO(bus);
410 	val = readl(&mdio->regs->alive);
473 	struct cpsw_mdio *mdio = bus->priv;
476 	/* disable mdio */
477 	reg = readl(&mdio->regs->control);
479 	writel(reg, &mdio->regs->control);
483 	free(mdio);
556 	{ .compatible = "ti,cpsw-mdio", },