Lines Matching refs:host

21 	struct sdhci_host host;
28 static inline struct sdhci_iproc_host *to_iproc(struct sdhci_host *host)
30 return (struct sdhci_iproc_host *)host;
34 static u32 sdhci_iproc_readl(struct sdhci_host *host, int reg)
36 u32 val = readl(host->ioaddr + reg);
39 host->name, host->index, reg, val);
44 static u16 sdhci_iproc_readw(struct sdhci_host *host, int reg)
46 u32 val = sdhci_iproc_readl(host, (reg & ~3));
51 static u8 sdhci_iproc_readb(struct sdhci_host *host, int reg)
53 u32 val = sdhci_iproc_readl(host, (reg & ~3));
58 static void sdhci_iproc_writel(struct sdhci_host *host, u32 val, int reg)
63 host->name, host->index, reg, val);
65 writel(val, host->ioaddr + reg);
67 if (host->mmc)
68 clock = host->mmc->clock;
97 static void sdhci_iproc_writew(struct sdhci_host *host, u16 val, int reg)
99 struct sdhci_iproc_host *iproc_host = to_iproc(host);
107 sdhci_iproc_writel(host, iproc_host->shadow_blk,
117 oldval = sdhci_iproc_readl(host, (reg & ~3));
129 sdhci_iproc_writel(host, newval, reg & ~3);
133 static void sdhci_iproc_writeb(struct sdhci_host *host, u8 val, int reg)
135 u32 oldval = sdhci_iproc_readl(host, (reg & ~3));
140 sdhci_iproc_writel(host, newval, reg & ~3);
144 static int sdhci_iproc_set_ios_post(struct sdhci_host *host)
146 struct mmc *mmc = (struct mmc *)host->mmc;
150 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
152 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
155 sdhci_set_uhs_timing(host);
159 static void sdhci_start_tuning(struct sdhci_host *host)
163 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
165 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
167 sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE);
168 sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_SIGNAL_ENABLE);
171 static void sdhci_end_tuning(struct sdhci_host *host)
174 sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK,
177 sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE);
185 struct sdhci_host *host = dev_get_priv(mmc->dev);
189 sdhci_start_tuning(host);
198 sdhci_writew(host, blocksize, SDHCI_BLOCK_SIZE);
199 sdhci_writew(host, 1, SDHCI_BLOCK_COUNT);
200 sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
212 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
221 sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL2);
226 sdhci_end_tuning(host);
253 struct sdhci_host *host = dev_get_priv(dev);
261 printf("%s: sdhci host malloc fail!\n", __func__);
267 host->name = dev->name;
268 host->ioaddr = dev_read_addr_ptr(dev);
269 host->quirks = SDHCI_QUIRK_BROKEN_R1B;
270 host->host_caps = MMC_MODE_DDR_52MHz;
271 host->index = fdtdec_get_uint(gd->fdt_blob, node, "index", 0);
272 host->ops = &sdhci_platform_ops;
273 host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
281 host->max_clk = f_min_max[1];
282 host->bus_width = fdtdec_get_int(gd->fdt_blob,
286 if (host->bus_width == 8)
287 host->host_caps |= MMC_MODE_8BIT;
289 memcpy(&iproc_host->host, host, sizeof(struct sdhci_host));
291 iproc_host->host.mmc = &plat->mmc;
292 iproc_host->host.mmc->dev = dev;
293 iproc_host->host.mmc->priv = &iproc_host->host;
294 upriv->mmc = iproc_host->host.mmc;
296 ret = sdhci_setup_cfg(&plat->cfg, &iproc_host->host,