Lines Matching refs:port_mmio
123 struct sata_port_regs *port_mmio = NULL;
169 uc_priv->port[i].port_mmio = ahci_port_base(host_mmio, i);
170 port_mmio = uc_priv->port[i].port_mmio;
173 tmp = readl(&port_mmio->cmd);
188 writel_with_flush(tmp, &port_mmio->cmd);
197 while ((readl(&port_mmio->cmd) & SATA_PORT_CMD_CR)
208 tmp = readl(&port_mmio->cmd);
209 writel((tmp | SATA_PORT_CMD_SUD), &port_mmio->cmd);
213 while (!(readl(&port_mmio->cmd) | SATA_PORT_CMD_SUD)
223 tmp = readl(&port_mmio->ssts);
231 while (!(readl(&port_mmio->serr) & SATA_PORT_SERR_DIAG_X)
244 tmp = readl(&port_mmio->serr);
247 writel(tmp, &port_mmio->serr);
258 writel(DEF_PORT_IRQ, &port_mmio->ie);
261 tmp = readl(&port_mmio->ssts);
380 struct sata_port_regs *port_mmio = pp->port_mmio;
384 cmd_slot = AHCI_GET_CMD_SLOT(readl(&port_mmio->ci));
408 writel_with_flush(1 << cmd_slot, &port_mmio->ci);
410 if (waiting_for_cmd_completed((u8 *)&port_mmio->ci, 10000,
443 struct sata_port_regs *port_mmio = pp->port_mmio;
449 port_status = readl(&port_mmio->ssts);
488 writel_with_flush(0x00004444, &port_mmio->dmacr);
490 writel_with_flush((u32)pp->cmd_slot, &port_mmio->clb);
491 writel_with_flush(pp->rx_fis, &port_mmio->fb);
494 writel_with_flush((SATA_PORT_CMD_FRE | readl(&port_mmio->cmd)),
495 &port_mmio->cmd);
498 while ((readl(&port_mmio->tfd) & (SATA_PORT_TFD_STS_ERR |
510 PORT_CMD_START, &port_mmio->cmd);
850 struct sata_port_regs *port_mmio;
852 port_mmio = uc_priv->port[port].port_mmio;
853 return readl(&port_mmio->ssts) & SATA_PORT_SSTS_DET_MASK ? 0 : -ENXIO;