Lines Matching defs:popts
17 void fsl_ddr_board_options(memctl_options_t *popts,
45 if (popts->registered_dimm_en)
59 popts->clk_adjust = pbsp->clk_adjust;
60 popts->wrlvl_start = pbsp->wrlvl_start;
61 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
62 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
74 popts->clk_adjust = pbsp_highest->clk_adjust;
75 popts->wrlvl_start = pbsp_highest->wrlvl_start;
76 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
77 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
90 popts->data_bus_width = 1;
91 popts->otf_burst_chop_en = 0;
92 popts->burst_length = DDR_BL8;
93 popts->bstopre = 0; /* enable auto precharge */
124 popts->half_strength_driver_enable = 0;
128 popts->wrlvl_override = 1;
129 popts->wrlvl_sample = 0x0; /* 32 clocks */
134 popts->rtt_override = 0;
137 popts->zq_en = 1;
142 popts->ddr_cdr1 = DDR_CDR1_DHC_EN |
144 popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm);
145 popts->twot_en = 1; /* enable 2T timing */
147 popts->ddr_cdr1 = DDR_CDR1_DHC_EN |
149 popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_60ohm) |
153 popts->ddr_cdr1 = DDR_CDR1_DHC_EN |
155 popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_100ohm) |