Lines Matching defs:lanes
67 } lanes[SRDS_MAX_LANES] = {
101 return lanes[lane].idx;
106 return lanes[lane].bank;
114 int bank = lanes[lane].bank;
115 int word = lanes[lane].lpd / 32;
116 int bit = lanes[lane].lpd % 32;
278 * want to enable the bank, whether we actually want to use the lanes or not,
283 * think that the lanes actually are disabled.
291 * If we're asked to disable all lanes, just pretend we're doing
298 * Enable the lanes SRDS_LPD_Bn. The RCW bits are read-only in
341 * protocol configurations. This requires that banks 2 and 3's lanes be
353 * The disabled lanes of bank 2 will cause the associated
384 * be used and should have its lanes (but not the bank
419 * If PCIe is not selected as a protocol for any lanes driven by a given PLL,
573 /* Look for banks with all lanes disabled, and power down the bank. */
585 * protocols, these lanes are routed to SATA. We use serdes_prtcl_map
672 if (lanes[lane].bank == bank)
674 idx = lanes[lane].idx;
716 * for each of the SerDes lanes selected as SGMII, XAUI, SRIO,