include/mach/cvmx-pow.h

790  *  64-bit store was used for all these stores.
795  *  NOTE: The following is the behavior of the pending switch bit at the PP
797  *     - did<2:0> == 0      => pending switch bit is set
798  *     - did<2:0> == 1      => no affect on the pending switch bit
799  *     - did<2:0> == 3      => pending switch bit is cleared
800  *     - did<2:0> == 7      => no affect on the pending switch bit
802  *     - No other loads/stores have an affect on the pending switch bit
803  *     - The switch bus from POW can clear the pending switch bit
1027  * Waits for a tag switch to complete by polling the completion bit.
1150  *     which is either a valid WQE, or a response with the invalid bit set.
1188  *     which is either a valid WQE, or a response with the invalid bit set.
1244  * switch pending bit will be set by the switch request, but never cleared by
1322  * switch pending bit will be set by the switch request, but never cleared by
1358  * switch pending bit will be set by the switch request, but never cleared by
1465  * to NULL, as the tag switch pending bit will be set by the switch request,
1656  * @param mask   Group mask, one bit for up to 64 groups.
1657  *               Each 1 bit in the mask enables the core to accept work from
1663  * so the 'mask' argument has one bit for every of the legacy
1694 		unsigned int bit;  /* bit index */
1700 		/* 78xx: 256 groups divided into 4 X 64 bit registers */
1704 			for (bit = 0; bit < 64; bit++) {
1705 				/* 8-bit native XGRP number */
1706 				xgrp = (rix << 6) | bit;
1707 				/* Legacy 5-bit group number */
1711 					grp_msk.s.grp_msk |= 1ull << bit;
1738  * Return:	Group mask, one bit for up to 64 groups.
1739  *               Each 1 bit in the mask enables the core to accept work from
1745  * so the 'mask' argument has one bit for every of the legacy
1763 		/* 78xx: 256 groups divided into 4 X 64 bit registers */
1808 		/* 78xx: 256 groups divided into 4 X 64 bit registers */
2224  *     corresponding bit set, and removed from the mask set with corresponding
2225  *     bit clear.
2328  *     which is either a valid WQE, or a response with the invalid bit set.
2420  *     Bit 0 represents the first mask set, bit 1 -- the second.
2423  *     64-bits mask sets. Each bit in the mask, if set, enables
2476  *     Bit 0 represents the first mask set, bit 1 -- the second.
2479  *     64-bits mask sets. Each bit in the mask represents
2786 /* Define usage of bits within the 32 bit tag values.                         */
2790  * are always a contiguous block of the high starting at bit 31.
2821 /* The remaining values software bit values 0x2 - 0xff are available
2825  * This function creates a 32 bit tag value from the two values provided.
2832  * Return: 32 bit value of the combined hw and sw bits.
2843  * @param tag    32 bit tag value
2845  * Return: N bit software tag value, where N is configurable with
2857  * @param tag    32 bit tag value
2859  * Return: (32 - N) bit software tag value, where N is configurable with