Lines Matching refs:CLK_INFRA_NR_CLK
50 #define CLK_INFRA_NR_CLK 37
172 #define CK_INFRA_UART0_SEL (0 + CLK_INFRA_NR_CLK)
173 #define CK_INFRA_UART1_SEL (1 + CLK_INFRA_NR_CLK)
174 #define CK_INFRA_UART2_SEL (2 + CLK_INFRA_NR_CLK)
175 #define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK)
176 #define CK_INFRA_SPI1_SEL (4 + CLK_INFRA_NR_CLK)
177 #define CK_INFRA_SPI2_SEL (5 + CLK_INFRA_NR_CLK)
178 #define CK_INFRA_PWM1_SEL (6 + CLK_INFRA_NR_CLK)
179 #define CK_INFRA_PWM2_SEL (7 + CLK_INFRA_NR_CLK)
180 #define CK_INFRA_PWM_BSEL (8 + CLK_INFRA_NR_CLK)
181 #define CK_INFRA_PCIE_SEL (9 + CLK_INFRA_NR_CLK)