Lines Matching defs:dmc
13 #include <asm/arch/dmc.h>
39 struct exynos5_dmc *dmc;
45 dmc = (struct exynos5_dmc *)samsung_get_base_dmc_ctrl();
75 &dmc->concontrol);
77 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3);
102 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3);
105 &dmc->concontrol);
108 writel(mem->iv_size, &dmc->ivcontrol);
110 writel(mem->memconfig, &dmc->memconfig0);
111 writel(mem->memconfig, &dmc->memconfig1);
112 writel(mem->membaseconfig0, &dmc->membaseconfig0);
113 writel(mem->membaseconfig1, &dmc->membaseconfig1);
117 &dmc->prechconfig);
122 &dmc->pwrdnconfig);
127 writel(mem->timing_ref, &dmc->timingref);
128 writel(mem->timing_row, &dmc->timingrow);
129 writel(mem->timing_data, &dmc->timingdata);
130 writel(mem->timing_power, &dmc->timingpower);
133 dmc_config_prech(mem, &dmc->directcmd);
136 dmc_config_mrs(mem, &dmc->directcmd);
182 writel(CTRL_RDLVL_GATE_ENABLE, &dmc->rdlvl_config);
184 while ((readl(&dmc->phystatus) &
196 writel(CTRL_RDLVL_GATE_DISABLE, &dmc->rdlvl_config);
211 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3);
215 dmc_config_prech(mem, &dmc->directcmd);
217 writel(mem->memcontrol, &dmc->memcontrol);
221 | (mem->aref_en << CONCONTROL_AREF_EN_SHIFT), &dmc->concontrol);
838 * this saves around 25 mw dmc power as compared to the power