plat/tk1/mux.c

88         .gpio_pin = _gp, .mux_reg_index = _mro, .mux_sfio_value = _msv, \
145         int16_t     gpio_pin, mux_reg_index;
260 static volatile uint32_t *tk1_mux_get_group_reg_handle_for_pin(const mux_sys_t *ms, int mux_reg_index)
267     group_offset = tk1_mux_get_group_offset_for_pin(mux_reg_index);
273                                                int mux_reg_index,
281     reg = tk1_mux_get_group_reg_handle_for_pin(ms, mux_reg_index);
282     group_offset = tk1_mux_get_group_offset_for_pin(mux_reg_index);
310     regval = s->pinmux_aux[desc->mux_reg_index] & 0xFF;
401     s->pinmux_aux[desc->mux_reg_index] = requiredval;
403     assert(s->pinmux_aux[desc->mux_reg_index] == requiredval);
407 static bool pin_is_pull_up_by_default(int mux_reg_index)
445         if (pull_up_pin_indexes[i] == mux_reg_index * 4) {
452 static void tk1_mux_set_pin_unused(volatile uint32_t *regs, uint16_t mux_reg_index,
483     if (pin_is_pull_up_by_default(mux_reg_index)) {
489     regs[mux_reg_index] = 0
530                 map->pins[i].mux_reg_index,
531                 map->pins[i].mux_reg_index * sizeof(uint32_t),
533                 s->pinmux_aux[map->pins[i].mux_reg_index]);
546             if ((s->pinmux_aux[map->pins[i].mux_reg_index]
549                                        map->pins[i].mux_reg_index, true);
580                                            map->pins[i].mux_reg_index,
584                 map->pins[i].mux_reg_index,
585                 map->pins[i].mux_reg_index * sizeof(uint32_t),
587                 s->pinmux_aux[map->pins[i].mux_reg_index]);
607         tk1_mux_set_pin_unused(s->pinmux_aux, map->pins[i].mux_reg_index, false);