zynq7000/uboot/marvell.c

174 	int reg;
181 		reg = phy_read(phydev,
185 			reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY);
187 			reg &= ~MIIM_88E1111_TX_DELAY;
188 			reg |= MIIM_88E1111_RX_DELAY;
190 			reg &= ~MIIM_88E1111_RX_DELAY;
191 			reg |= MIIM_88E1111_TX_DELAY;
195 			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
197 		reg = phy_read(phydev,
200 		reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK);
202 		if (reg & MIIM_88E1111_HWCFG_FIBER_COPPER_RES)
203 			reg |= MIIM_88E1111_HWCFG_MODE_FIBER_RGMII;
205 			reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RGMII;
208 			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR, reg);
212 		reg = phy_read(phydev,
215 		reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK);
216 		reg |= MIIM_88E1111_HWCFG_MODE_SGMII_NO_CLK;
217 		reg |= MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
220 			MIIM_88E1111_PHY_EXT_SR, reg);
224 		reg = phy_read(phydev,
226 		reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY);
228 			MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
230 		reg = phy_read(phydev, MDIO_DEVAD_NONE,
232 		reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK |
234 		reg |= 0x7 | MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
236 			MIIM_88E1111_PHY_EXT_SR, reg);
242 		reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
243 		while ((reg & BMCR_RESET) && --timeout) {
245 			reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
250 		reg = phy_read(phydev, MDIO_DEVAD_NONE,
252 		reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK |
254 		reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RTBI |
257 			MIIM_88E1111_PHY_EXT_SR, reg);
264 	reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
265 	while ((reg & BMCR_RESET) && --timeout) {
267 		reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
283 	u16 reg, mask;
290 	reg = phy_read(phydev, MDIO_DEVAD_NONE, reg_num);
292 	reg &= ~mask;
293 	reg |= data << offset;
295 	phy_write(phydev, MDIO_DEVAD_NONE, reg_num, reg);
322 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
413 	int reg;
424 	reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_EXT_CR);
426 		reg |= MIIM_M88E1145_RGMII_RX_DELAY |
428 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_EXT_CR, reg);
466 	u16 reg;
470 	reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_LED_CTRL);
471 	reg = (reg & ~0xf) | 0x1;
472 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_LED_CTRL, reg);
476 	reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_IRQ_EN);
477 	reg = (reg & 0x77ff) | 0x0880;
478 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_IRQ_EN, reg);
482 	reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_RGMII_CTRL);
483 	reg |= 0x0030;
484 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_RGMII_CTRL, reg);