Lines Matching refs:MHZ
1041 [CLK_ARM_PLL] = 1333 * MHZ,
1042 [CLK_DDR_PLL] = 1067 * MHZ,
1043 [CLK_IO_PLL] = 1000 * MHZ,
1044 [CLK_CPU_6OR4X] = 667 * MHZ,
1045 [CLK_CPU_3OR2X] = 333 * MHZ,
1046 [CLK_CPU_2X] = 222 * MHZ,
1047 [CLK_CPU_1X] = 111 * MHZ,
1048 [CLK_DDR_2X] = 356 * MHZ,
1049 [CLK_DDR_3X] = 533 * MHZ,
1050 [CLK_DCI] = 10 * MHZ,
1051 [CLK_SMC] = 100 * MHZ,
1052 [CLK_LQSPI] = 200 * MHZ,
1053 [CLK_GEM0] = 125 * MHZ,
1054 [CLK_GEM1] = 125 * MHZ,
1055 [CLK_SDIO0] = 100 * MHZ,
1056 [CLK_SDIO1] = 100 * MHZ,
1057 [CLK_UART0] = 25 * MHZ,
1058 [CLK_UART1] = 25 * MHZ,
1059 [CLK_SPI0] = 200 * MHZ,
1060 [CLK_SPI1] = 200 * MHZ,
1061 [CLK_CAN0] = 100 * MHZ,
1062 [CLK_CAN1] = 100 * MHZ,
1063 [CLK_PCAP] = 200 * MHZ,
1064 [CLK_DBG] = 100 * MHZ,
1065 [CLK_FPGA_PL0] = 50 * MHZ,
1066 [CLK_FPGA_PL1] = 50 * MHZ,
1067 [CLK_FPGA_PL2] = 50 * MHZ,
1068 [CLK_FPGA_PL3] = 50 * MHZ,