Lines Matching refs:regs
28 uart_regs_t *regs = uart_get_priv(d);
29 if (regs->line_status & LSR_DATA_READY_MASK) {
30 return regs->rx_buffer;
35 static void busy_wait_fifo_empty_and_tx_char(uart_regs_t *regs, int c)
38 while ((regs->line_status & LSR_TX_HOLD_REG_EMPTY_MASK) == 0) {
42 regs->tx_buffer = c;
47 uart_regs_t *regs = uart_get_priv(d);
51 busy_wait_fifo_empty_and_tx_char(regs, '\r');
54 busy_wait_fifo_empty_and_tx_char(regs, c);
68 uart_regs_t *regs;
91 regs = uart_get_priv(dev);
93 regs->line_control = LCR_WORD_LEN_8;
94 regs->modem_control = 0;
95 regs->multi_mode_control_0 = 0;
96 regs->multi_mode_control_1 = 0;
97 regs->multi_mode_control_2 = 0;
98 regs->glitch_filter = 0;
99 regs->transmitter_time_guard = 0;
100 regs->receiver_time_out = 0;
116 regs->line_control |= LCR_DIV_LATCH_MASK;
117 regs->divisor_latch_msb = (uint8_t)(divisor >> 8);
118 regs->divisor_latch_lsb = (uint8_t)divisor;
119 regs->line_control &= ~LCR_DIV_LATCH_MASK;
121 regs->multi_mode_control_0 |= MM0_ENABLE_FRAC_MASK;
122 regs->fractional_divisor = (uint8_t)fractional_divisor;
123 regs->line_control = LCR_WORD_LEN_8;