Lines Matching defs:x0
1548 ({BadVAddr = BitsN.B(0x0,64),
1550 {BD = false, CE = BitsN.B(0x0,2), ExcCode = BitsN.B(0x0,5),
1551 IP = BitsN.B(0x0,8), TI = false,
1552 causeregister'rst = BitsN.B(0x0,15)}, Compare = BitsN.B(0x0,32),
1554 {AR = BitsN.B(0x0,3), AT = BitsN.B(0x0,2), BE = false,
1555 K0 = BitsN.B(0x0,3), M = false, MT = BitsN.B(0x0,3),
1556 configregister'rst = BitsN.B(0x0,19)},
1558 {C2 = false, CA = false, DA = BitsN.B(0x0,3), DL = BitsN.B(0x0,3),
1559 DS = BitsN.B(0x0,3), EP = false, FP = false, IA = BitsN.B(0x0,3),
1560 IL = BitsN.B(0x0,3), IS = BitsN.B(0x0,3), M = false, MD = false,
1561 MMUSize = BitsN.B(0x0,6), PC = false, WR = false},
1563 {M = false, SA = BitsN.B(0x0,4), SL = BitsN.B(0x0,4),
1564 SS = BitsN.B(0x0,4), SU = BitsN.B(0x0,4), TA = BitsN.B(0x0,4),
1565 TL = BitsN.B(0x0,4), TS = BitsN.B(0x0,4), TU = BitsN.B(0x0,3)},
1569 configregister3'rst = BitsN.B(0x0,22)},
1571 {LTLB = false, TLBSize = BitsN.B(0x0,16),
1572 configregister6'rst = BitsN.B(0x0,15)},
1574 {BadVPN2 = BitsN.B(0x0,19), PTEBase = BitsN.B(0x0,41),
1575 context'rst = BitsN.B(0x0,4)}, Count = BitsN.B(0x0,32),
1576 Debug = BitsN.B(0x0,32), EPC = BitsN.B(0x0,64),
1578 {ASID = BitsN.B(0x0,8), R = BitsN.B(0x0,2), VPN2 = BitsN.B(0x0,27),
1579 entryhi'rst = BitsN.B(0x0,27)},
1581 {C = BitsN.B(0x0,3), D = false, G = false, PFN = BitsN.B(0x0,28),
1582 V = false, entrylo'rst = BitsN.B(0x0,30)},
1584 {C = BitsN.B(0x0,3), D = false, G = false, PFN = BitsN.B(0x0,28),
1585 V = false, entrylo'rst = BitsN.B(0x0,30)},
1586 ErrCtl = BitsN.B(0x0,32), ErrorEPC = BitsN.B(0x0,64),
1589 hwrena'rst = BitsN.B(0x0,28)},
1591 {Index = BitsN.B(0x0,8), P = false, index'rst = BitsN.B(0x0,23)},
1592 LLAddr = BitsN.B(0x0,64), PRId = BitsN.B(0x0,32),
1593 PageMask = {Mask = BitsN.B(0x0,12), pagemask'rst = BitsN.B(0x0,20)},
1594 Random = {Random = BitsN.B(0x0,8), random'rst = BitsN.B(0x0,24)},
1597 FR = false, IE = false, IM = BitsN.B(0x0,8), KSU = BitsN.B(0x0,2),
1599 statusregister'rst = BitsN.B(0x0,11)}, UsrLocal = BitsN.B(0x0,64),
1600 Wired = {Wired = BitsN.B(0x0,8), wired'rst = BitsN.B(0x0,24)},
1602 {BadVPN2 = BitsN.B(0x0,27), PTEBase = BitsN.B(0x0,31),
1603 R = BitsN.B(0x0,2), xcontext'rst = BitsN.B(0x0,4)}}): CP0 ref
1605 val FGR = ref (Map.mkMap(SOME 32,BitsN.B(0x0,64)))
1610 val MEM = ref (Map.mkMap(SOME 18446744073709551616,BitsN.B(0x0,8)))
1613 val PC = ref (BitsN.B(0x0,64)): BitsN.nbit ref
1621 FCC = BitsN.B(0x0,8), FS = false, FlagI = false, FlagO = false,
1623 RM = BitsN.B(0x0,2), fcsr'rst = BitsN.B(0x0,3)}): FCSR ref
1627 PrID = BitsN.B(0x0,8), Rev = BitsN.B(0x0,8), S = false, W = false,
1628 fir'rst = BitsN.B(0x0,9)}): FIR ref
1630 val gpr = ref (Map.mkMap(SOME 32,BitsN.B(0x0,64)))
2014 (not(top = (BitsN.B(0x0,33)))) andalso
2020 val x0 = #Cause((!CP0) : CP0)
2026 (x0,
2028 Int => BitsN.B(0x0,5)
2051 val x0 = #Cause((!CP0) : CP0)
2054 (CP0_Cause_rupd((!CP0),CauseRegister_BD_rupd(x0,true)))
2060 val x0 = #Cause((!CP0) : CP0)
2063 (CP0_Cause_rupd((!CP0),CauseRegister_BD_rupd(x0,false)))
2077 val x0 = #Status((!CP0) : CP0)
2080 (CP0_Status_rupd((!CP0),StatusRegister_EXL_rupd(x0,true)))
2104 val x0 = #Cause((!CP0) : CP0)
2107 (CP0_Cause_rupd((!CP0),CauseRegister_CE_rupd(x0,BitsN.B(0x1,2))))
2123 ((#KSU((#Status((!CP0) : CP0)) : StatusRegister)) = (BitsN.B(0x0,2))) orelse
2128 if n = (BitsN.B(0x0,5))
2129 then BitsN.B(0x0,64)
2133 if not(n = (BitsN.B(0x0,5)))
2149 (0,(BitsN.B(0x8,_),BitsN.B(0x0,_))) => #BadVAddr((!CP0) : CP0)
2150 | (0,(BitsN.B(0x9,_),BitsN.B(0x0,_))) =>
2152 | (0,(BitsN.B(0xB,_),BitsN.B(0x0,_))) =>
2154 | (0,(BitsN.B(0xC,_),BitsN.B(0x0,_))) =>
2157 | (0,(BitsN.B(0xD,_),BitsN.B(0x0,_))) =>
2160 | (0,(BitsN.B(0xE,_),BitsN.B(0x0,_))) => #EPC((!CP0) : CP0)
2161 | (0,(BitsN.B(0xF,_),BitsN.B(0x0,_))) =>
2163 | (0,(BitsN.B(0x10,_),BitsN.B(0x0,_))) =>
2166 | (0,(BitsN.B(0x11,_),BitsN.B(0x0,_))) => #LLAddr((!CP0) : CP0)
2167 | (0,(BitsN.B(0x17,_),BitsN.B(0x0,_))) =>
2169 | (0,(BitsN.B(0x1A,_),BitsN.B(0x0,_))) =>
2171 | (0,(BitsN.B(0x1E,_),BitsN.B(0x0,_))) => #ErrorEPC((!CP0) : CP0)
2172 | _ => BitsN.B(0x0,64);
2176 (0,(BitsN.B(0x9,_),BitsN.B(0x0,_))) =>
2178 | (0,(BitsN.B(0xB,_),BitsN.B(0x0,_))) =>
2180 | (0,(BitsN.B(0xC,_),BitsN.B(0x0,_))) =>
2182 val x0 = #Status((!CP0) : CP0)
2186 ((!CP0),write'reg'StatusRegister(x0,BitsN.bits(31,0) value)))
2188 | (0,(BitsN.B(0xD,_),BitsN.B(0x0,_))) =>
2190 val x0 = #Cause((!CP0) : CP0)
2194 ((!CP0),write'reg'CauseRegister(x0,BitsN.bits(31,0) value)))
2196 | (0,(BitsN.B(0xE,_),BitsN.B(0x0,_))) =>
2198 | (0,(BitsN.B(0x10,_),BitsN.B(0x0,_))) =>
2200 val x0 = #Config((!CP0) : CP0)
2204 ((!CP0),write'reg'ConfigRegister(x0,BitsN.bits(31,0) value)))
2206 | (0,(BitsN.B(0x17,_),BitsN.B(0x0,_))) =>
2208 | (0,(BitsN.B(0x1A,_),BitsN.B(0x0,_))) =>
2210 | (0,(BitsN.B(0x1E,_),BitsN.B(0x0,_))) =>
2214 val BYTE = BitsN.B(0x0,3)
2235 (BitsN.B(0x0,3));
2239 BitsN.B(0x0,_) =>
2251 BitsN.B(0x0,1))),64))
2256 (BitsN.toNat(BitsN.@@(ReverseEndian (),BitsN.B(0x0,2))),64))
2289 ; BitsN.B(0x0,64)
2295 then BitsN.B(0x0,64)
2350 BitsN.B(0x0,1)))
2376 BitsN.@@(BigEndianCPU (),BitsN.B(0x0,2)))
2411 BitsN.@@(BigEndianCPU (),BitsN.B(0x0,2)))
2617 (BitsN.bits(2,0) vAddr,BitsN.@@(BigEndianCPU (),BitsN.B(0x0,2)))
2702 then BitsN.B(0x0,32)
2707 then BitsN.B(0x0,64)
2724 BitsN.B(0x0,_) => IEEEReal.TO_NEAREST
2823 BitsN.B(0x0,_) => false
2872 BitsN.B(0x0,_) => false
3198 BitsN.@@(BigEndianCPU (),BitsN.B(0x0,2)))
3225 BitsN.@@(BigEndianCPU (),BitsN.B(0x0,2)))
3320 else if not((GPR rt) = (BitsN.B(0x0,64)))
3329 else if not((GPR rt) = (BitsN.B(0x0,64)))
3367 else if (GPR rt) = (BitsN.B(0x0,64))
3376 else if (GPR rt) = (BitsN.B(0x0,64))
3604 BitsN.@@(BigEndianCPU (),BitsN.B(0x0,2)))
3623 BitsN.@@(BigEndianCPU (),BitsN.B(0x0,2)))
3710 BitsN.B(0x0,_) => BitsN.signExtend 64 (reg'FIR (!fir))
3721 BitsN.B(0x0,_) => ()
3794 write'GPR(BitsN.signExtend 64 (BitsN.@@(immediate,BitsN.B(0x0,16))),rt);
3887 if not((GPR rt) = (BitsN.B(0x0,64))) then write'GPR(GPR rs,rd) else ();
3890 if (GPR rt) = (BitsN.B(0x0,64)) then write'GPR(GPR rs,rd) else ();
4031 ; if t = (BitsN.B(0x0,64))
4052 ; if t = (BitsN.B(0x0,64))
4069 if t = (BitsN.B(0x0,64))
4082 if t = (BitsN.B(0x0,64))
4272 (BitsN.@@(BitsN.B(0x0,1),byte),(false,(vAddr,Option.SOME false))))
4279 (BitsN.B(0x0,_),BitsN.B(0x0,_)) =>
4283 | (BitsN.B(0x0,_),BitsN.B(0x1,_)) =>
4287 | (BitsN.B(0x0,_),BitsN.B(0x2,_)) =>
4291 | (BitsN.B(0x0,_),BitsN.B(0x3,_)) =>
4293 | (BitsN.B(0x1,_),BitsN.B(0x0,_)) =>
4323 (BitsN.-(WORD,BitsN.@@(BitsN.B(0x0,1),byte)),
4331 (BitsN.B(0x0,_),BitsN.B(0x0,_)) =>
4333 | (BitsN.B(0x0,_),BitsN.B(0x1,_)) =>
4337 | (BitsN.B(0x0,_),BitsN.B(0x2,_)) =>
4341 | (BitsN.B(0x0,_),BitsN.B(0x3,_)) =>
4345 | (BitsN.B(0x1,_),BitsN.B(0x0,_)) =>
4378 BitsN.B(0x0,_) =>
4426 BitsN.B(0x0,_) => BitsN.bits(63,0) memdoubleword
4480 (BitsN.resize_replicate 2 (BigEndianCPU (),2),BitsN.B(0x0,1)))
4519 BitsN.B(0x0,_) =>
4551 (BitsN.B(0x0,_),BitsN.B(0x0,_)) =>
4553 | (BitsN.B(0x0,_),BitsN.B(0x1,_)) =>
4556 | (BitsN.B(0x0,_),BitsN.B(0x2,_)) =>
4559 | (BitsN.B(0x0,_),BitsN.B(0x3,_)) =>
4562 | (BitsN.B(0x1,_),BitsN.B(0x0,_)) =>
4592 BitsN.B(0x0,_) =>
4624 BitsN.B(0x0,_) => GPR rt
4670 val x0 = #Status((!CP0) : CP0)
4674 ((!CP0),StatusRegister_ERL_rupd(x0,false)))
4679 val x0 = #Status((!CP0) : CP0)
4683 ((!CP0),StatusRegister_EXL_rupd(x0,false)))
4719 BitsN.concat[BitsN.bits(63,28) (!PC),instr_index,BitsN.B(0x0,2)]));
4726 BitsN.concat[BitsN.bits(63,28) (!PC),instr_index,BitsN.B(0x0,2)]))
4747 ConditionalBranch(BitsN.<=(GPR rs,BitsN.B(0x0,64)),offset);
4750 ConditionalBranch(BitsN.>(GPR rs,BitsN.B(0x0,64)),offset);
4753 ConditionalBranch(BitsN.<(GPR rs,BitsN.B(0x0,64)),offset);
4756 ConditionalBranch(BitsN.>=(GPR rs,BitsN.B(0x0,64)),offset);
4763 ; ConditionalBranch(BitsN.<(temp,BitsN.B(0x0,64)),offset)
4772 ; ConditionalBranch(BitsN.>=(temp,BitsN.B(0x0,64)),offset)
4783 ConditionalBranchLikely(BitsN.<=(GPR rs,BitsN.B(0x0,64)),offset);
4786 ConditionalBranchLikely(BitsN.>(GPR rs,BitsN.B(0x0,64)),offset);
4789 ConditionalBranchLikely(BitsN.<(GPR rs,BitsN.B(0x0,64)),offset);
4792 ConditionalBranchLikely(BitsN.>=(GPR rs,BitsN.B(0x0,64)),offset);
4799 ; ConditionalBranchLikely(BitsN.<(temp,BitsN.B(0x0,64)),offset)
4808 ; ConditionalBranchLikely(BitsN.>=(temp,BitsN.B(0x0,64)),offset)
11416 BitsN.B(0x0,_) => "index"
11454 BitsN.B(0x0,_) => "zero"
11579 if n = (BitsN.BV(0x0,N))
11609 if n = (BitsN.B(0x0,3))
11630 MFC1(rt,fs) => BitsN.concat[BitsN.B(0x220,11),rt,fs,BitsN.B(0x0,11)]
11631 | DMFC1(rt,fs) => BitsN.concat[BitsN.B(0x221,11),rt,fs,BitsN.B(0x0,11)]
11632 | CFC1(rt,fs) => BitsN.concat[BitsN.B(0x222,11),rt,fs,BitsN.B(0x0,11)]
11633 | MTC1(rt,fs) => BitsN.concat[BitsN.B(0x224,11),rt,fs,BitsN.B(0x0,11)]
11634 | DMTC1(rt,fs) => BitsN.concat[BitsN.B(0x225,11),rt,fs,BitsN.B(0x0,11)]
11635 | CTC1(rt,fs) => BitsN.concat[BitsN.B(0x226,11),rt,fs,BitsN.B(0x0,11)]
11636 | BC1F(i,cc) => BitsN.concat[BitsN.B(0x228,11),cc,BitsN.B(0x0,2),i]
11641 BitsN.concat[BitsN.B(0x230,11),ft,fs,fd,BitsN.B(0x0,6)]
11671 [BitsN.B(0x230,11),cc,BitsN.B(0x0,2),fs,fd,BitsN.B(0x11,6)]
11682 BitsN.concat[BitsN.B(0x231,11),ft,fs,fd,BitsN.B(0x0,6)]
11712 [BitsN.B(0x231,11),cc,BitsN.B(0x0,2),fs,fd,BitsN.B(0x11,6)]
11752 [BitsN.B(0x13,6),base,index,BitsN.B(0x0,5),fd,BitsN.B(0x0,6)]
11755 [BitsN.B(0x13,6),base,index,BitsN.B(0x0,5),fd,BitsN.B(0x1,6)]
11769 BitsN.concat[BitsN.B(0x0,6),rs,cc,BitsN.B(0x0,2),rd,BitsN.B(0x1,11)]
11771 BitsN.concat[BitsN.B(0x0,6),rs,cc,BitsN.B(0x1,2),rd,BitsN.B(0x1,11)]
11772 | UnknownFPInstruction => BitsN.B(0x0,32);
11775 BitsN.concat[BitsN.B(0x0,6),rs,rt,rd,imm5,function];
11781 BitsN.concat[BitsN.B(0x10,6),function,rt,rd,BitsN.B(0x0,8),sel];
11786 BitsN.concat[BitsN.B(0x1C,6),rs,rt,rd,BitsN.B(0x0,5),function];
11790 [BitsN.B(0x1F,6),BitsN.B(0x0,5),rt,rd,BitsN.B(0x0,5),function];
11795 form1(BitsN.B(0x0,5),(rt,(rd,(imm5,BitsN.B(0x0,6)))))
11797 form1(BitsN.B(0x0,5),(rt,(rd,(imm5,BitsN.B(0x2,6)))))
11799 form1(BitsN.B(0x0,5),(rt,(rd,(imm5,BitsN.B(0x3,6)))))
11801 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x4,6)))))
11803 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x6,6)))))
11805 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x7,6)))))
11809 (BitsN.B(0x0,5),(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x8,6)))))
11811 form1(rs,(BitsN.B(0x0,5),(rd,(BitsN.B(0x0,5),BitsN.B(0x9,6)))))
11814 (BitsN.B(0x0,5),
11815 (BitsN.B(0x0,5),(rd,(BitsN.B(0x0,5),BitsN.B(0x10,6)))))
11819 (BitsN.B(0x0,5),(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x11,6)))))
11822 (BitsN.B(0x0,5),
11823 (BitsN.B(0x0,5),(rd,(BitsN.B(0x0,5),BitsN.B(0x12,6)))))
11827 (BitsN.B(0x0,5),(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x13,6)))))
11829 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x14,6)))))
11831 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x16,6)))))
11833 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x17,6)))))
11835 form5(rs,(rt,(BitsN.B(0x0,5),BitsN.B(0x0,6))))
11837 form5(rs,(rt,(BitsN.B(0x0,5),BitsN.B(0x1,6))))
11839 form5(rs,(rt,(BitsN.B(0x0,5),BitsN.B(0x4,6))))
11841 form5(rs,(rt,(BitsN.B(0x0,5),BitsN.B(0x5,6))))
11844 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x18,6)))))
11846 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x19,6)))))
11848 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x1A,6)))))
11850 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x1B,6)))))
11852 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x1C,6)))))
11854 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x1D,6)))))
11856 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x1E,6)))))
11858 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x1F,6)))))
11860 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0xA,6)))))
11862 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0xB,6)))))
11864 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x20,6)))))
11866 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x21,6)))))
11868 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x22,6)))))
11870 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x23,6)))))
11872 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x24,6)))))
11874 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x25,6)))))
11876 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x26,6)))))
11878 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x27,6)))))
11880 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x2A,6)))))
11882 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x2B,6)))))
11884 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x2C,6)))))
11886 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x2D,6)))))
11888 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x2E,6)))))
11890 form1(rs,(rt,(rd,(BitsN.B(0x0,5),BitsN.B(0x2F,6)))))
11892 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x30,6)))))
11894 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x31,6)))))
11896 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x32,6)))))
11898 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x33,6)))))
11900 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x34,6)))))
11902 form1(rs,(rt,(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x36,6)))))
11904 form1(BitsN.B(0x0,5),(rt,(rd,(imm5,BitsN.B(0x38,6)))))
11906 form1(BitsN.B(0x0,5),(rt,(rd,(imm5,BitsN.B(0x3A,6)))))
11908 form1(BitsN.B(0x0,5),(rt,(rd,(imm5,BitsN.B(0x3B,6)))))
11910 form1(BitsN.B(0x0,5),(rt,(rd,(imm5,BitsN.B(0x3C,6)))))
11912 form1(BitsN.B(0x0,5),(rt,(rd,(imm5,BitsN.B(0x3E,6)))))
11914 form1(BitsN.B(0x0,5),(rt,(rd,(imm5,BitsN.B(0x3F,6)))))
11915 | Branch(BLTZ(rs,imm)) => form2(rs,(BitsN.B(0x0,5),imm))
11931 | CP(MFC0(rt,(rd,sel))) => form3(BitsN.B(0x0,5),(rt,(rd,sel)))
11938 form4(BitsN.B(0x6,6),(rs,(BitsN.B(0x0,5),imm)))
11940 form4(BitsN.B(0x7,6),(rs,(BitsN.B(0x0,5),imm)))
11949 form4(BitsN.B(0xF,6),(BitsN.B(0x0,5),(rt,imm)))
11953 form4(BitsN.B(0x16,6),(rs,(BitsN.B(0x0,5),imm)))
11955 form4(BitsN.B(0x17,6),(rs,(BitsN.B(0x0,5),imm)))
11995 | ReservedInstruction => BitsN.B(0x0,32);
12006 if cc = (BitsN.B(0x0,3))
12021 if cc = (BitsN.B(0x0,3))
12036 if cc = (BitsN.B(0x0,3))
12051 if cc = (BitsN.B(0x0,3))
12063 | C_cond_D(fs,(ft,(BitsN.B(0x0,3),cc))) =>
12079 | C_cond_S(fs,(ft,(BitsN.B(0x0,3),cc))) =>
12181 Shift(SLL(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x0,5)))) => "nop"
12182 | Shift(SLL(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x1,5)))) => "ssnop"
12259 | Branch(BEQ(BitsN.B(0x0,5),(BitsN.B(0x0,5),imm))) =>
12389 [#"z",#"e",#"r",#"o"] => Option.SOME(BitsN.B(0x0,5))
12479 OK(Shift(SLL(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x0,5)))))
12481 OK(Shift(SLL(BitsN.B(0x0,5),(BitsN.B(0x0,5),BitsN.B(0x1,5)))))
12544 OK(COP1(C_cond_D(fd,(fs,(BitsN.B(0x0,3),BitsN.B(0x0,3))))))
12546 OK(COP1(C_cond_D(fd,(fs,(BitsN.B(0x1,3),BitsN.B(0x0,3))))))
12548 OK(COP1(C_cond_D(fd,(fs,(BitsN.B(0x2,3),BitsN.B(0x0,3))))))
12550 OK(COP1(C_cond_D(fd,(fs,(BitsN.B(0x3,3),BitsN.B(0x0,3))))))
12552 OK(COP1(C_cond_D(fd,(fs,(BitsN.B(0x4,3),BitsN.B(0x0,3))))))
12554 OK(COP1(C_cond_D(fd,(fs,(BitsN.B(0x5,3),BitsN.B(0x0,3))))))
12556 OK(COP1(C_cond_D(fd,(fs,(BitsN.B(0x6,3),BitsN.B(0x0,3))))))
12558 OK(COP1(C_cond_D(fd,(fs,(BitsN.B(0x7,3),BitsN.B(0x0,3))))))
12560 OK(COP1(C_cond_S(fd,(fs,(BitsN.B(0x0,3),BitsN.B(0x0,3))))))
12562 OK(COP1(C_cond_S(fd,(fs,(BitsN.B(0x1,3),BitsN.B(0x0,3))))))
12564 OK(COP1(C_cond_S(fd,(fs,(BitsN.B(0x2,3),BitsN.B(0x0,3))))))
12566 OK(COP1(C_cond_S(fd,(fs,(BitsN.B(0x3,3),BitsN.B(0x0,3))))))
12568 OK(COP1(C_cond_S(fd,(fs,(BitsN.B(0x4,3),BitsN.B(0x0,3))))))
12570 OK(COP1(C_cond_S(fd,(fs,(BitsN.B(0x5,3),BitsN.B(0x0,3))))))
12572 OK(COP1(C_cond_S(fd,(fs,(BitsN.B(0x6,3),BitsN.B(0x0,3))))))
12574 OK(COP1(C_cond_S(fd,(fs,(BitsN.B(0x7,3),BitsN.B(0x0,3))))))
12611 "c.f.d" => OK(COP1(C_cond_D(fd,(fs,(BitsN.B(0x0,3),cc)))))
12619 | "c.f.s" => OK(COP1(C_cond_S(fd,(fs,(BitsN.B(0x0,3),cc)))))
12713 else (BitsN.BV(0x0,N),"Immediate too large: " ^ s)
12715 else (BitsN.BV(0x0,N),"Immediate not aligned or too small: " ^ s)
12737 then OK(Branch(BEQ(BitsN.B(0x0,5),(BitsN.B(0x0,5),i))))
12744 if e = "" then OK(COP1(BC1F(i,BitsN.B(0x0,3)))) else FAIL e
12750 if e = "" then OK(COP1(BC1FL(i,BitsN.B(0x0,3)))) else FAIL e
12756 if e = "" then OK(COP1(BC1T(i,BitsN.B(0x0,3)))) else FAIL e
12762 if e = "" then OK(COP1(BC1TL(i,BitsN.B(0x0,3)))) else FAIL e