Lines Matching refs:MASK
167 word_t idx = (vaddr & MASK(pageBitsForSize(ARMSection))) >> pageBitsForSize(ARMSmallPage);
431 idx = (seL4_GlobalsFrame >> PAGE_BITS) & (MASK(PT_INDEX_BITS));
453 targetSlot = pt + ((vptr & MASK(pageBitsForSize(ARMSection)))
695 pd = poolPtr->array[asid & MASK(asidLowBits)];
735 return (word_t *)(basePtr + (w_bufferPtr & MASK(pageBits)));
756 if (unlikely(vptr & MASK(seL4_IPCBufferSizeBits))) {
794 ptIndex = (vptr >> PAGE_BITS) & MASK(PT_INDEX_BITS);
808 ptIndex = (vptr >> PAGE_BITS) & MASK(PT_INDEX_BITS);
835 ret.frameBase &= ~MASK(pageBitsForSize(ARMSuperSection));
853 ret.frameBase &= ~MASK(pageBitsForSize(ARMLargePage));
1178 pd = asidPool->array[asid & MASK(asidLowBits)];
1193 pd = asidPool->array[asid & MASK(asidLowBits)];
1208 pd = asidPool->array[asid & MASK(asidLowBits)];
1329 addr = (addressTranslateS1CPR(addr) & ~MASK(PAGE_BITS)) | (addr & MASK(PAGE_BITS));
1360 pc = (addressTranslateS1CPR(pc) & ~MASK(PAGE_BITS)) | (pc & MASK(PAGE_BITS));
1397 assert((asid_base & MASK(asidLowBits)) == 0);
1418 if (poolPtr != NULL && poolPtr->array[asid & MASK(asidLowBits)] == pd) {
1421 poolPtr->array[asid & MASK(asidLowBits)] = NULL;
1585 assert((vptr & MASK(pageBitsForSize(page_size))) == 0);
1592 base_addr = vptr & ~MASK(12);
1609 assert((vptr & MASK(PT_INDEX_BITS + ARMSmallPageBits)) == 0);
1665 return (w & MASK(pageBitsForSize(sz))) == 0;
1866 return vaddr & ~MASK(pageBitsForSize(size));
2166 poolPtr->array[asid & MASK(asidLowBits)] =
2188 assert((asid_base & MASK(asidLowBits)) == 0);
2283 MASK(pageBitsForSize(resolve_ret.frameSize));
2290 + (start & MASK(pageBitsForSize(resolve_ret.frameSize)));
3151 offset = vaddr & MASK(ARMSectionBits);
3158 offset = vaddr & MASK(ARMLargePageBits);
3160 offset = vaddr & MASK(ARMSmallPageBits);
3165 offset = vaddr & MASK(ARMSmallPageBits);
3168 offset = vaddr & MASK(ARMLargePageBits);