Lines Matching refs:dst
1734 fun dfn'bin_PD (bop,(dst,src)) =
1736 val dst = xmm_reg dst
1737 val x = XMM dst
1744 ( process_float_flags[f1,f2]; write'XMM(BitsN.@@(r1,r2),dst) )
1747 fun dfn'bin_PS (bop,(dst,src)) =
1749 val dst = xmm_reg dst
1750 val x = XMM dst
1762 ; write'XMM(BitsN.concat[r1,r2,r3,r4],dst)
1766 fun dfn'bin_SD (bop,(dst,src)) =
1768 val dst = xmm_reg dst
1769 val x = XMM dst
1775 val w = XMM dst
1777 write'XMM(BitsN.bitFieldInsert(63,0) (w,r),dst)
1782 fun dfn'bin_SS (bop,(dst,src)) =
1784 val dst = xmm_reg dst
1785 val x = XMM dst
1791 val w = XMM dst
1793 write'XMM(BitsN.bitFieldInsert(31,0) (w,r),dst)
1798 fun dfn'logic_PD (bop,(dst,src)) =
1800 val dst = xmm_reg dst
1801 val x = XMM dst
1807 write'XMM(BitsN.@@(r1,r2),dst)
1810 fun dfn'logic_PS (bop,(dst,src)) =
1812 val dst = xmm_reg dst
1813 val x = XMM dst
1821 write'XMM(BitsN.concat[r1,r2,r3,r4],dst)
1824 fun dfn'CMPPD (cmp,(dst,src)) =
1826 val dst = xmm_reg dst
1827 val x = XMM dst
1834 ( process_float_flags[f1,f2]; write'XMM(BitsN.@@(r1,r2),dst) )
1837 fun dfn'CMPPS (cmp,(dst,src)) =
1839 val dst = xmm_reg dst
1840 val x = XMM dst
1852 ; write'XMM(BitsN.concat[r1,r2,r3,r4],dst)
1856 fun dfn'CMPSD (cmp,(dst,src)) =
1858 val dst = xmm_reg dst
1859 val x = XMM dst
1866 val w = XMM dst
1868 write'XMM(BitsN.bitFieldInsert(63,0) (w,r),dst)
1873 fun dfn'CMPSS (cmp,(dst,src)) =
1875 val dst = xmm_reg dst
1876 val x = XMM dst
1883 val w = XMM dst
1885 write'XMM(BitsN.bitFieldInsert(31,0) (w,r),dst)
1930 fun dfn'CVTDQ2PD (dst,src) =
1934 val x0 = xmm_reg dst
1942 fun dfn'CVTDQ2PS (dst,src) =
1953 val x = xmm_reg dst
1960 fun dfn'CVTPD2DQ (truncate,(dst,src)) =
1969 val x = xmm_reg dst
1977 fun dfn'CVTPD2PS (dst,src) =
1989 val x = xmm_reg dst
1997 fun dfn'CVTPS2DQ (truncate,(dst,src)) =
2008 val x = xmm_reg dst
2015 fun dfn'CVTPS2PD (dst,src) =
2027 val x = xmm_reg dst
2035 fun dfn'CVTSD2SI (truncate,(quad,(dst,src))) =
2046 ; let val x = Zea_r(Z64,dst) in write'EA(w,x) end
2054 val x = Zea_r(Z32,dst)
2062 fun dfn'CVTSD2SS (dst,src) =
2071 val x = xmm_reg dst
2079 fun dfn'CVTSI2SD (quad,(dst,src)) =
2086 val x = xmm_reg dst
2094 fun dfn'CVTSI2SS (quad,(dst,src)) =
2101 val x = xmm_reg dst
2109 fun dfn'CVTSS2SD (dst,src) =
2118 val x = xmm_reg dst
2127 fun dfn'CVTSS2SI (truncate,(quad,(dst,src))) =
2138 ; let val x = Zea_r(Z64,dst) in write'EA(w,x) end
2146 val x = Zea_r(Z32,dst)
2154 fun dfn'MOVAP_D_S (double,(dst,src)) =
2155 ( CheckAlignedXMM(dst,4)
2157 ; write'XMM(XMM src,dst)
2160 fun dfn'MOVUP_D_S (double,(dst,src)) = write'XMM(XMM src,dst);
2191 fun dfn'MOVQ (dst,src) =
2192 case dst of
2194 write'XMM(BitsN.zeroExtend 128 (BitsN.bits(63,0) (XMM src)),dst)
2202 fun dfn'MOVSD (dst,src) =
2206 val w = XMM dst
2209 (BitsN.bitFieldInsert(63,0) (w,BitsN.bits(63,0) (XMM src)),dst)
2212 write'XMM(BitsN.zeroExtend 128 (BitsN.bits(63,0) (XMM src)),dst);
2214 fun dfn'MOVSS (dst,src) =
2218 val w = XMM dst
2221 (BitsN.bitFieldInsert(31,0) (w,BitsN.bits(31,0) (XMM src)),dst)
2224 write'XMM(BitsN.zeroExtend 128 (BitsN.bits(31,0) (XMM src)),dst);
2226 fun dfn'PCMPEQQ (dst,src) =
2228 val dst = xmm_reg dst
2229 val x = XMM dst
2239 else BitsN.B(0x0,64)),dst)
2242 fun dfn'PSLLDQ (dst,imm) =
2244 val dst = xmm_reg dst
2246 write'XMM(BitsN.<<(XMM dst,Nat.*(Nat.min(16,BitsN.toNat imm),8)),dst)
2249 fun dfn'PSLLD_imm (dst,imm) =
2251 val dst = xmm_reg dst
2252 val x = XMM dst
2259 BitsN.<<(BitsN.bits(31,0) x,i)],dst)
2262 fun dfn'PSLLQ_imm (dst,imm) =
2264 val dst = xmm_reg dst
2265 val x = XMM dst
2271 dst)
2274 fun dfn'PSLLW_imm (dst,imm) =
2276 val dst = xmm_reg dst
2277 val x = XMM dst
2287 dst)
2290 fun dfn'PSRAD_imm (dst,imm) =
2292 val dst = xmm_reg dst
2293 val x = XMM dst
2300 BitsN.>>(BitsN.bits(31,0) x,i)],dst)
2303 fun dfn'PSRAW_imm (dst,imm) =
2305 val dst = xmm_reg dst
2306 val x = XMM dst
2316 dst)
2319 fun dfn'PSRLDQ (dst,imm) =
2321 val dst = xmm_reg dst
2323 write'XMM(BitsN.>>+(XMM dst,Nat.*(Nat.min(16,BitsN.toNat imm),8)),dst)
2326 fun dfn'PSRLD_imm (dst,imm) =
2328 val dst = xmm_reg dst
2329 val x = XMM dst
2337 dst)
2340 fun dfn'PSRLQ_imm (dst,imm) =
2342 val dst = xmm_reg dst
2343 val x = XMM dst
2349 BitsN.>>+(BitsN.bits(63,0) x,i)),dst)
2352 fun dfn'PSRLW_imm (dst,imm) =
2354 val dst = xmm_reg dst
2355 val x = XMM dst
2367 dst)
2370 fun dfn'SQRTPD (dst,src) =
2377 ; let val x = xmm_reg dst in write'XMM(BitsN.@@(r1,r2),x) end
2381 fun dfn'SQRTSD (dst,src) =
2388 val x = xmm_reg dst
2396 fun dfn'SQRTPS (dst,src) =
2406 val x = xmm_reg dst
2413 fun dfn'SQRTSS (dst,src) =
2420 val x = xmm_reg dst
4496 bin_PD(bop,(dst,src)) =>
4502 (BitsN.fromNat(BitsN.toNat dst,4),
4507 | bin_PS(bop,(dst,src)) =>
4511 (BitsN.fromNat(BitsN.toNat dst,4),
4516 | bin_SD(bop,(dst,src)) =>
4522 (BitsN.fromNat(BitsN.toNat dst,4),
4527 | bin_SS(bop,(dst,src)) =>
4533 (BitsN.fromNat(BitsN.toNat dst,4),
4538 | logic_PD(bop,(dst,src)) =>
4544 (BitsN.fromNat(BitsN.toNat dst,4),
4550 | logic_PS(bop,(dst,src)) =>
4554 (BitsN.fromNat(BitsN.toNat dst,4),
4560 | CMPPD(bop,(dst,src)) =>
4566 (BitsN.fromNat(BitsN.toNat dst,4),
4571 | CMPPS(bop,(dst,src)) =>
4575 (BitsN.fromNat(BitsN.toNat dst,4),
4579 | CMPSD(bop,(dst,src)) =>
4585 (BitsN.fromNat(BitsN.toNat dst,4),
4590 | CMPSS(bop,(dst,src)) =>
4596 (BitsN.fromNat(BitsN.toNat dst,4),
4616 | CVTDQ2PD(dst,src) =>
4622 (BitsN.fromNat(BitsN.toNat dst,4),
4625 | CVTDQ2PS(dst,src) =>
4629 (BitsN.fromNat(BitsN.toNat dst,4),
4631 | CVTPD2DQ(truncate,(dst,src)) =>
4637 (BitsN.fromNat(BitsN.toNat dst,4),
4640 | CVTPD2PS(dst,src) =>
4646 (BitsN.fromNat(BitsN.toNat dst,4),
4649 | CVTPS2DQ(truncate,(dst,src)) =>
4655 (BitsN.fromNat(BitsN.toNat dst,4),
4658 | CVTPS2PD(dst,src) =>
4662 (BitsN.fromNat(BitsN.toNat dst,4),
4664 | CVTSD2SI(truncate,(quad,(dst,src))) =>
4670 (BitsN.fromNat(Cast.ZregToNat dst,4),
4674 | CVTSD2SS(dst,src) =>
4680 (BitsN.fromNat(BitsN.toNat dst,4),
4701 | CVTSS2SD(dst,src) =>
4707 (BitsN.fromNat(BitsN.toNat dst,4),
4710 | CVTSS2SI(truncate,(quad,(dst,src))) =>
4716 (BitsN.fromNat(Cast.ZregToNat dst,4),
4720 | MOVAP_D_S(double,(xmm_reg dst,src)) =>
4726 (BitsN.fromNat(BitsN.toNat dst,4),
4729 | MOVAP_D_S(double,(dst,xmm_reg src)) =>
4734 (xmm_mem_to_rm dst,
4739 | MOVUP_D_S(double,(xmm_reg dst,src)) =>
4745 (BitsN.fromNat(BitsN.toNat dst,4),
4748 | MOVUP_D_S(double,(dst,xmm_reg src)) =>
4753 (xmm_mem_to_rm dst,
4758 | MOVSD(xmm_reg dst,src) =>
4764 (BitsN.fromNat(BitsN.toNat dst,4),
4767 | MOVSD(dst,xmm_reg src) =>
4772 (xmm_mem_to_rm dst,
4777 | MOVSS(xmm_reg dst,src) =>
4783 (BitsN.fromNat(BitsN.toNat dst,4),
4786 | MOVSS(dst,xmm_reg src) =>
4791 (xmm_mem_to_rm dst,
4824 | PCMPEQQ(dst,src) =>
4830 (BitsN.fromNat(BitsN.toNat dst,4),
4833 | PSRLW_imm(dst,imm) =>
4838 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4844 | PSRAW_imm(dst,imm) =>
4849 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4855 | PSLLW_imm(dst,imm) =>
4860 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4866 | PSRLD_imm(dst,imm) =>
4871 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4877 | PSRAD_imm(dst,imm) =>
4882 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4888 | PSLLD_imm(dst,imm) =>
4893 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4899 | PSRLQ_imm(dst,imm) =>
4904 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4910 | PSRLDQ(dst,imm) =>
4915 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4921 | PSLLQ_imm(dst,imm) =>
4926 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4932 | PSLLDQ(dst,imm) =>
4937 (Zr((Cast.natToZreg o BitsN.toNat) dst),
4943 | SQRTPD(dst,src) =>
4949 (BitsN.fromNat(BitsN.toNat dst,4),
4952 | SQRTSD(dst,src) =>
4958 (BitsN.fromNat(BitsN.toNat dst,4),
4961 | SQRTPS(dst,src) =>
4965 (BitsN.fromNat(BitsN.toNat dst,4),
4967 | SQRTSS(dst,src) =>
4973 (BitsN.fromNat(BitsN.toNat dst,4),
5916 (Option.SOME dst,Option.SOME src) =>
5918 val a = (dst,src)
6039 | (Option.SOME dst,Option.SOME src) =>
6041 val a = (double,(dst,src))
6051 | (Option.SOME dst,Option.SOME src) =>
6053 val a = (dst,src)
6828 bin_PD(bop,(dst,src)) => ((s_sse_binop bop) ^ "pd",s_xmm(dst,src))
6829 | bin_PS(bop,(dst,src)) => ((s_sse_binop bop) ^ "ps",s_xmm(dst,src))
6830 | bin_SD(bop,(dst,src)) => ((s_sse_binop bop) ^ "sd",s_xmm(dst,src))
6831 | bin_SS(bop,(dst,src)) => ((s_sse_binop bop) ^ "ss",s_xmm(dst,src))
6832 | logic_PD(bop,(dst,src)) => ((s_sse_logic bop) ^ "pd",s_xmm(dst,src))
6833 | logic_PS(bop,(dst,src)) => ((s_sse_logic bop) ^ "ps",s_xmm(dst,src))
6834 | CMPPD(bop,(dst,src)) =>
6835 (String.concat["cmp",s_sse_compare bop,"pd"],s_xmm(dst,src))
6836 | CMPPS(bop,(dst,src)) =>
6837 (String.concat["cmp",s_sse_compare bop,"ps"],s_xmm(dst,src))
6838 | CMPSD(bop,(dst,src)) =>
6839 (String.concat["cmp",s_sse_compare bop,"sd"],s_xmm(dst,src))
6840 | CMPSS(bop,(dst,src)) =>
6841 (String.concat["cmp",s_sse_compare bop,"ss"],s_xmm(dst,src))
6844 | CVTDQ2PD(dst,src) => ("cvtdq2pd",s_xmm(dst,src))
6845 | CVTDQ2PS(dst,src) => ("cvtdq2ps",s_xmm(dst,src))
6846 | CVTPD2DQ(false,(dst,src)) => ("cvtpd2dq",s_xmm(dst,src))
6847 | CVTPD2DQ(true,(dst,src)) => ("cvttpd2dq",s_xmm(dst,src))
6848 | CVTPD2PS(dst,src) => ("cvtpd2ps",s_xmm(dst,src))
6849 | CVTPS2DQ(false,(dst,src)) => ("cvtps2dq",s_xmm(dst,src))
6850 | CVTPS2DQ(true,(dst,src)) => ("cvttps2dq",s_xmm(dst,src))
6851 | CVTPS2PD(dst,src) => ("cvtps2pd",s_xmm(dst,src))
6852 | CVTSD2SI(truncate,(quad,(dst,src))) =>
6855 [s_register(if quad then Z64 else Z32,dst),", ",s_xmm_mem src])
6856 | CVTSD2SS(dst,src) => ("cvtsd2ss",s_xmm(dst,src))
6857 | CVTSI2SD(quad,(dst,src)) =>
6859 String.concat[s_xreg dst,", ",s_rm(if quad then Z64 else Z32,src)])
6860 | CVTSI2SS(quad,(dst,src)) =>
6862 String.concat[s_xreg dst,", ",s_rm(if quad then Z64 else Z32,src)])
6863 | CVTSS2SD(dst,src) => ("cvtss2sd",s_xmm(dst,src))
6864 | CVTSS2SI(truncate,(quad,(dst,src))) =>
6867 [s_register(if quad then Z64 else Z32,dst),", ",s_xmm_mem src])
6868 | MOVAP_D_S(double,(dst,src)) =>
6870 String.concat[s_xmm_mem dst,", ",s_xmm_mem src])
6871 | MOVUP_D_S(double,(dst,src)) =>
6873 String.concat[s_xmm_mem dst,", ",s_xmm_mem src])
6881 | MOVSD(dst,src) =>
6882 ("movsd",String.concat[s_xmm_mem dst,", ",s_xmm_mem src])
6883 | MOVSS(dst,src) =>
6884 ("movss",String.concat[s_xmm_mem dst,", ",s_xmm_mem src])
6885 | MOVQ(dst,src) =>
6886 ("movq",String.concat[s_xmm_mem dst,", ",s_xmm_mem src])
6887 | PCMPEQQ(dst,src) => ("pcmpeqq",s_xmm(dst,src))
6888 | PSRLW_imm(dst,i) =>
6889 ("psrlw",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6890 | PSRAW_imm(dst,i) =>
6891 ("psraw",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6892 | PSLLW_imm(dst,i) =>
6893 ("psllw",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6894 | PSRLD_imm(dst,i) =>
6895 ("psrld",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6896 | PSRAD_imm(dst,i) =>
6897 ("psrad",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6898 | PSLLD_imm(dst,i) =>
6899 ("pslld",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6900 | PSRLQ_imm(dst,i) =>
6901 ("psrlq",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6902 | PSLLQ_imm(dst,i) =>
6903 ("psllq",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6904 | PSRLDQ(dst,i) =>
6905 ("psrldq",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6906 | PSLLDQ(dst,i) =>
6907 ("pslldq",String.concat[s_xreg dst,", ",BitsN.toHexString i])
6908 | SQRTPD(dst,src) => ("sqrtpd",s_xmm(dst,src))
6909 | SQRTPS(dst,src) => ("sqrtps",s_xmm(dst,src))
6910 | SQRTSD(dst,src) => ("sqrtsd",s_xmm(dst,src))
6911 | SQRTSS(dst,src) => ("sqrtss",s_xmm(dst,src));