Lines Matching defs:divisor
178 /* Each clock uses a 6-bit divisor */
328 /* Set divisors where only one divisor is available */
361 * clock uses one divisor or two.
363 * If the clock only has one divisor (i.e. rdiv1 is NULL), then this
407 * Ensure the divisor is an even number. If it isn't, make it in even number.
408 * @param divisor: Divisor to check
409 * @return : An even-number divisor
412 zynq7000_even_divisor(uint8_t divisor)
414 if ((divisor % 2) != 0) {
415 return INRANGE(CLK_DIVISOR_MIN + 1, divisor - 1, CLK_DIVISOR_MAX - 1);
417 return divisor;
567 uint32_t divisor;
575 divisor = divisor0;
578 divisor = divisor0 * 2;
581 divisor = divisor0 * ((clk_621_true) ? 3 : 2);
584 divisor = divisor0 * ((clk_621_true) ? 6 : 4);
592 fout = fin / divisor;
614 /* CPU clocks must have an even divisor */
694 /* DDR_3XCLK must have an even divisor */