drivers/spi/spi-cns3xxx.c

53 #define SPI_MEM_MAP_VALUE(reg_offset)		(*((u32 volatile *)(hw->base + reg_offset)))
92 static inline u8 cns3xxx_spi_bus_idle(struct cns3xxx_spi *hw)
97 static inline u8 cns3xxx_spi_tx_buffer_empty(struct cns3xxx_spi *hw)
102 static inline u8 cns3xxx_spi_rx_buffer_full(struct cns3xxx_spi *hw)
107 u8 cns3xxx_spi_tx_rx(struct cns3xxx_spi *hw, u8 tx_channel, u8 tx_eof,
113 	while (!cns3xxx_spi_bus_idle(hw)) ;	// do nothing
115 	while (!cns3xxx_spi_tx_buffer_empty(hw)) ;	// do nothing
122 	while (!cns3xxx_spi_rx_buffer_full(hw)) ;	// do nothing
136 u8 cns3xxx_spi_tx(struct cns3xxx_spi *hw, u8 tx_channel, u8 tx_eof, u32 tx_data)
139         while (!cns3xxx_spi_bus_idle(hw)) ;       // do nothing
141         while (!cns3xxx_spi_tx_buffer_empty(hw)) ;        // do nothing
164 	struct cns3xxx_spi *hw = to_hw(spi);
204 	struct cns3xxx_spi *hw = to_hw(spi);
209 	hw->tx = t->tx_buf;
210 	hw->rx = t->rx_buf;
211 	hw->len = t->len;
212 	hw->count = 0;
213 	hw->last_in_message_list = t->last_in_message_list;
215 	init_completion(&hw->done);
217 	if (hw->tx) {
220 		for (i = 0; i < (hw->len - 1); i++) {
222 				"[SPI_CNS3XXX_DEBUG] hw->tx[%02d]: 0x%02x\n", i,
223 				hw->tx[i]);
224 			cns3xxx_spi_tx_rx(hw, spi->chip_select, 0, hw->tx[i],
226 			if (hw->rx) {
227 				hw->rx[i] = rx_data;
229 					"[SPI_CNS3XXX_DEBUG] hw->rx[%02d]: 0x%02x\n",
230 					i, hw->rx[i]);
235 			cns3xxx_spi_tx_rx(hw, spi->chip_select, 1, hw->tx[i],
237 			if (hw->rx) {
238 				hw->rx[i] = rx_data;
240 					"[SPI_CNS3XXX_DEBUG] hw->rx[%02d]: 0x%02x\n",
241 					i, hw->rx[i]);
244 			cns3xxx_spi_tx_rx(hw, spi->chip_select, 0, hw->tx[i],
250 	if (hw->rx) {
253 		for (i = 0; i < (hw->len - 1); i++) {
254 			cns3xxx_spi_tx_rx(hw, spi->chip_select, 0, 0xff, &rx_data);
255 			hw->rx[i] = rx_data;
257 				"[SPI_CNS3XXX_DEBUG] hw->rx[%02d]: 0x%02x\n", i,
258 				hw->rx[i]);
262 			cns3xxx_spi_tx_rx(hw, spi->chip_select, 1, 0xff, &rx_data);
264 			cns3xxx_spi_tx_rx(hw, spi->chip_select, 0, 0xff, &rx_data);
266 		hw->rx[i] = rx_data;
267 		dev_dbg(&spi->dev, "[SPI_CNS3XXX_DEBUG] hw->rx[%02d]: 0x%02x\n",
268 			i, hw->rx[i]);
271 	return hw->len;
274 static void __init cns3xxx_spi_initial(struct cns3xxx_spi *hw)
317 	struct cns3xxx_spi *hw;
335 	hw = spi_master_get_devdata(master);
336 	memset(hw, 0, sizeof(struct cns3xxx_spi));
338 	hw->master = spi_master_get(master);
339 	hw->dev = &pdev->dev;
341 	hw->base = devm_ioremap_resource(hw->dev, res);
342 	if (IS_ERR(hw->base)) {
343 		dev_err(hw->dev, "Unable to map registers\n");
344 		err = PTR_ERR(hw->base);
348 	platform_set_drvdata(pdev, hw);
349 	init_completion(&hw->done);
358 	hw->bitbang.master = hw->master;
359 	hw->bitbang.setup_transfer = cns3xxx_spi_setup_transfer;
360 	hw->bitbang.chipselect = cns3xxx_spi_chipselect;
361 	hw->bitbang.txrx_bufs = cns3xxx_spi_txrx;
362 	hw->bitbang.master->setup = cns3xxx_spi_setup;
364 	dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang);
367 	cns3xxx_spi_initial(hw);
371 	err = spi_bitbang_start(&hw->bitbang);
380 	spi_master_put(hw->master);;
388 	struct cns3xxx_spi *hw = platform_get_drvdata(dev);
392 	spi_unregister_master(hw->master);
394 	spi_master_put(hw->master);
402 	struct cns3xxx_spi *hw = platform_get_drvdata(pdev);
409 	struct cns3xxx_spi *hw = platform_get_drvdata(pdev);