Lines Matching refs:IFX_REG_W32
547 IFX_REG_W32(isr, MBOX_IGU1_ISRC);
794 IFX_REG_W32(0x90111293, TX_CTRL_K_TABLE(0));
795 IFX_REG_W32(0x14959617, TX_CTRL_K_TABLE(1));
796 IFX_REG_W32(0x18999A1B, TX_CTRL_K_TABLE(2));
797 IFX_REG_W32(0x9C1D1E9F, TX_CTRL_K_TABLE(3));
798 IFX_REG_W32(0xA02122A3, TX_CTRL_K_TABLE(4));
799 IFX_REG_W32(0x24A5A627, TX_CTRL_K_TABLE(5));
800 IFX_REG_W32(0x28A9AA2B, TX_CTRL_K_TABLE(6));
801 IFX_REG_W32(0xAC2D2EAF, TX_CTRL_K_TABLE(7));
802 IFX_REG_W32(0x30B1B233, TX_CTRL_K_TABLE(8));
803 IFX_REG_W32(0xB43536B7, TX_CTRL_K_TABLE(9));
804 IFX_REG_W32(0xB8393ABB, TX_CTRL_K_TABLE(10));
805 IFX_REG_W32(0x3CBDBE3F, TX_CTRL_K_TABLE(11));
806 IFX_REG_W32(0xC04142C3, TX_CTRL_K_TABLE(12));
807 IFX_REG_W32(0x44C5C647, TX_CTRL_K_TABLE(13));
808 IFX_REG_W32(0x48C9CA4B, TX_CTRL_K_TABLE(14));
809 IFX_REG_W32(0xCC4D4ECF, TX_CTRL_K_TABLE(15));
907 IFX_REG_W32(0x0F, UTP_CFG);
929 IFX_REG_W32(0x00, UTP_CFG);
1001 IFX_REG_W32(1 << 16, MBOX_IGU1_IER); // enable SWAP interrupt
1002 IFX_REG_W32(~0, MBOX_IGU1_ISRC);