ltq-hcd/src/ifxhcd.c

217 			if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB))
327 			if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB))
396 	IFX_DEBUGPL(DBG_HCDV, "%s %p\n",__func__,_epqh);
432 	IFX_DEBUGPL(DBG_HCDV, "%s %p finish\n",__func__,_epqh);
450 	IFX_DEBUGPL(DBG_HCDV, "%s %p\n",__func__,_epqh_list);
466 	IFX_DEBUGPL(DBG_HCDV, "%s %p finish\n",__func__,_epqh_list);
481 	IFX_DEBUGPL(DBG_HCDV, "%s %p\n",__func__,_epqh_list);
502 	IFX_DEBUGPL(DBG_HCDV, "%s %p finish\n",__func__,_epqh_list);
542 	IFX_DEBUGPL(DBG_HCDV, "%s(%p)\n", __func__, _ifxhcd);
586 	IFX_DEBUGPL(DBG_HCDV, "%s(%p) finish\n", __func__, _ifxhcd);
690 			IFX_DEBUGPL(DBG_HCDV, "HCD Added channel #%d\n", i);
897 		if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB))
1131 			IFX_DEBUGPL(DBG_HCDV, "  port_connect_status_change: %d\n",
1133 			IFX_DEBUGPL(DBG_HCDV, "  port_reset_change: %d\n",
1135 			IFX_DEBUGPL(DBG_HCDV, "  port_enable_change: %d\n",
1137 			IFX_DEBUGPL(DBG_HCDV, "  port_suspend_change: %d\n",
1139 			IFX_DEBUGPL(DBG_HCDV, "  port_over_current_change: %d\n",
1144 				IFX_DEBUGPL(DBG_HCDV, "  port reg :%08X\n",hprt0.d32);
1145 				IFX_DEBUGPL(DBG_HCDV, "  port reg :connect: %d/%d\n",hprt0.b.prtconnsts,hprt0.b.prtconndet);
1146 				IFX_DEBUGPL(DBG_HCDV, "  port reg :enable: %d/%d\n",hprt0.b.prtena,hprt0.b.prtenchng);
1147 				IFX_DEBUGPL(DBG_HCDV, "  port reg :OC: %d/%d\n",hprt0.b.prtovrcurract,hprt0.b.prtovrcurrchng);
1148 				IFX_DEBUGPL(DBG_HCDV, "  port reg :rsume/suspend/reset: %d/%d/%d\n",hprt0.b.prtres,hprt0.b.prtsusp,hprt0.b.prtrst);
1149 				IFX_DEBUGPL(DBG_HCDV, "  port reg :port power: %d/\n",hprt0.b.prtpwr);
1150 				IFX_DEBUGPL(DBG_HCDV, "  port reg :speed: %d/\n",hprt0.b.prtspd);
1333 			IFX_DEBUGPL(DBG_HCDV, "  HPRT0: 0x%08x\n", hprt0.d32);
1757 	IFX_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, _ifxhc->hc_num);
1776 		IFX_DEBUGPL(DBG_HCDV, "  Xfer Size: %d\n", hctsiz.b.xfersize);
1777 		IFX_DEBUGPL(DBG_HCDV, "  Num Pkts: %d\n" , hctsiz.b.pktcnt);
1778 		IFX_DEBUGPL(DBG_HCDV, "  Start PID: %d\n", hctsiz.b.pid);
1780 	IFX_DEBUGPL(DBG_HCDV, "  DMA: 0x%08x\n", (uint32_t)(CPHYSADDR( ((uint32_t)(_ifxhc->xfer_buff))+ _ifxhc->xfer_count )));
1801 		IFX_DEBUGPL(DBG_HCDV, "  SPLIT: XACT_POS:0x%08x\n", hcsplt.d32);
1831 	IFX_DEBUGPL(DBG_HCDV, "  HCCHART: 0x%08x\n", _ifxhc->hcchar);
1936 	IFX_DEBUGPL(DBG_HCDV, "%s: Channel %d\n" , __func__, _ifxhc->hc_num);
1937 	IFX_DEBUGPL(DBG_HCDV, "  hcchar: 0x%08x\n"   , hcchar.d32);
1938 	IFX_DEBUGPL(DBG_HCDV, "  halt_status: %d\n"  , _ifxhc->halt_status);